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RM0090: Reference manual - STMicroelectronics

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<strong>RM0090</strong> USB on-the-go full-speed (OTG_FS)<br />

1. When an STALL, TXERR, BBERR or DTERR interrupt in OTG_FS_HCINTx is received<br />

for an IN or OUT channel. The application must be able to receive other interrupts<br />

(DTERR, Nak, Data, TXERR) for the same channel before receiving the halt.<br />

2. When a DISCINT (Disconnect Device) interrupt in OTG_FS_GINTSTS is received.<br />

(The application is expected to disable all enabled channels).<br />

3. When the application aborts a transfer before normal completion.<br />

Operational model<br />

The application must initialize a channel before communicating to the connected device.<br />

This section explains the sequence of operation to be performed for different types of USB<br />

transactions.<br />

● Writing the transmit FIFO<br />

The OTG_FS host automatically writes an entry (OUT request) to the periodic/nonperiodic<br />

request queue, along with the last DWORD write of a packet. The application<br />

must ensure that at least one free space is available in the periodic/non-periodic<br />

request queue before starting to write to the transmit FIFO. The application must<br />

always write to the transmit FIFO in DWORDs. If the packet size is non-DWORD<br />

aligned, the application must use padding. The OTG_FS host determines the actual<br />

packet size based on the programmed maximum packet size and transfer size.<br />

Figure 366. Transmit FIFO write task<br />

Read GNPTXSTS/HPTXFSIZ<br />

registers for available FIFO<br />

and queue spaces<br />

Wait for NPTXFE/PTXFE<br />

interrupt in<br />

OTG_FS_GINTSTS<br />

MPS: Maximum packet size<br />

LPS: Last packet size<br />

No<br />

Start<br />

1 MPS or<br />

LPS FIFO space<br />

available?<br />

Yes<br />

Write 1 packet<br />

data to<br />

transmit FIFO<br />

More packets<br />

to send?<br />

No<br />

Done<br />

ai15673b<br />

Doc ID 018909 Rev 3 1112/1416<br />

Yes

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