RM0090: Reference manual - STMicroelectronics

USB on-the-go high-speed (OTG_HS) RM0090
OTG_HS AHB configuration register (OTG_HS_GAHBCFG)
Address offset: 0x008
Reset value: 0x0000 0000
This register can be used to configure the core after power-on or a change in mode. This
register mainly contains AHB system-related configuration parameters. Do not change this
register after the initial programming. The application must program this register before
starting any transactions on either the AHB or the USB.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
Bits 31:20 Reserved, must be kept at reset value.
1183/1416 Doc ID 018909 Rev 3
PTXFELVL
TXFELVL
Reserved
DMAEN
HBSTLEN
GINT
rw rw rw rw
Bit 8 PTXFELVL: Periodic TxFIFO empty level
Indicates when the periodic TxFIFO empty interrupt bit in the Core interrupt register (PTXFE
bit in OTG_HS_GINTSTS) is triggered.
0: PTXFE (in OTG_HS_GINTSTS) interrupt indicates that the Periodic TxFIFO is half empty
1: PTXFE (in OTG_HS_GINTSTS) interrupt indicates that the Periodic TxFIFO is completely
empty
Note: Only accessible in host mode.
Bit 7 TXFELVL: TxFIFO empty level
In peripheral mode, this bit indicates when the IN endpoint Transmit FIFO empty interrupt
(TXFE in OTG_HS_DIEPINTx.) is triggered.
0: TXFE (in OTG_HS_DIEPINTx) interrupt indicates that the IN Endpoint TxFIFO is half
empty
1: TXFE (in OTG_HS_DIEPINTx) interrupt indicates that the IN Endpoint TxFIFO is
completely empty
Note: Only accessible in peripheral mode.
Bit 6 Reserved, must be kept at reset value.
Bits5 DMAEN: DMA enable
0: The core operates in slave mode
1: The core operates in DMA mode
Bits 4:1 HBSTLEN: Burst length/type
0000 Single
0001 INCR
0011 INCR4
0101 INCR8
0111 INCR16
Others: Reserved
Bit 0 GINT: Global interrupt mask
This bit is used to mask or unmask the interrupt line assertion to the application. Irrespective
of this bit setting, the interrupt status registers are updated by the core.
0: Mask the interrupt assertion to the application.
1: Unmask the interrupt assertion to the application
Note: Accessible in both peripheral and host modes.