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RM0090: Reference manual - STMicroelectronics

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<strong>RM0090</strong> Flexible static memory controller (FSMC)<br />

Table 199. FSMC_BTRx bit fields<br />

Bit number Bit name Value to set<br />

31-30 0x0<br />

29-28 ACCMOD 0x1 if extended mode is set<br />

27-20 0x000<br />

19-16 BUSTURN Time between NEx high to NEx low (BUSTURN HCLK)<br />

15-8 DATAST<br />

Duration of the access second phase (DATAST HCLK cycles) in<br />

read.<br />

7-4 0x0<br />

3-0 ADDSET<br />

Table 200. FSMC_BWTRx bit fields<br />

Bit<br />

number<br />

Duration of the access first phase (ADDSET HCLK cycles) in read.<br />

Minimum value for ADDSET is 0.<br />

Bit name Value to set<br />

31-30 0x0<br />

29-28 ACCMOD 0x1 if extended mode is set<br />

27-20 0x000<br />

19-16 BUSTURN Time between NEx high to NEx low (BUSTURN HCLK)<br />

15-8 DATAST<br />

Duration of the access second phase (DATAST+1 HCLK cycles) in<br />

write.<br />

7-4 0x0<br />

3-0 ADDSET<br />

Duration of the access first phase (ADDSET HCLK cycles) in write.<br />

Minimum value for ADDSET is 0.<br />

Note: The FSMC_BWTRx register is valid only if extended mode is set (mode B), otherwise all its<br />

content is don’t care.<br />

Doc ID 018909 Rev 3 1330/1416

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