RM0090: Reference manual - STMicroelectronics

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<strong>RM0090</strong> Reset and clock control for (RCC) Table 25. RCC register map and reset values for STM32F40x and STM32F41x (continued) Addr. offset 0x40 0x44 RCC_APB1E NR RCC_APB2E NR Reserved DACEN PWREN Reserved CAN2EN CAN1EN Reserved I2C3EN I2C2EN Reserved I2C1EN UART5EN UART4EN USART3EN USART2EN Reserved SPI3EN TIM11EN TIM10EN TIM9EN Reserved 0x48 Reserved Reserved 0x4C Reserved Reserved 0x50 0x54 0x58 RCC_AHB1L PENR RCC_AHB2L PENR RCC_AHB3L PENR Reserved OTGHSULPILPEN OTGHSLPEN ETHMACPTPLPEN ETHMACRXLPEN ETHMACTXLPEN ETHMACLPEN Reserved DMA2LPEN DMA1LPEN Reserved Reserved BKPSRAMLPEN SRAM2LPEN SRAM1LPEN FLITFLPEN Reserved 0x5C Reserved Reserved 0x60 0x64 RCC_APB1L PENR RCC_APB2L PENR Reserved DACLPEN PWRLPEN Reserved CAN2LPEN CAN1LPEN Reserved I2C3LPEN Reserved I2C2LPEN I2C1LPEN UART5LPEN UART4LPEN USART3LPEN USART2LPEN TIM11LPEN TIM10LPEN Reserved SPI3LPEN TIM9LPEN Reserved 0x68 Reserved Reserved 0x6C Reserved Reserved 0x70 RCC_BDCR Reserved 0x74 RCC_CSR LPWRRSTF WWDGRSTF WDGRSTF SFTRSTF PORRSTF PADRSTF BORRSTF RMVF BDRST RTCEN 0x78 Reserved Reserved 0x7C Reserved Reserved 0x80 RCC_SSCGR 0x84 Register name 31 RCC_PLLI2S CFGR SSCGEN Reserved 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SPREADSEL Reserved SPI2EN SYSCFGEN Reserved SPI2LPEN Reserved SYSCFGLPEN Reserved Reserved Reserved WWDGEN SPI1EN SDIOEN CRCLPEN WWDGLPEN SPI1LPEN SDIOLPEN Reserved Reserved Doc ID 018909 Rev 3 182/1416 Reserved ADC3EN ADC2EN Reserved Reserved ADC3LPEN ADC2LPEN TIM14EN TIM13EN ADC1EN GPIOILPEN GPIOHLPEN TIM14LPEN TIM13LPEN ADC1LPEN RTCSEL 1 RTCSEL 0 Reserved TIM12EN TIM7EN GPIOGLPEN GPIOFLPEN USART6EN USART1EN OTGFSLPEN RNGLPEN HASHLPEN CRYPLPEN Reserved TIM12LPEN TIM7LPEN USART6LPEN USART1LPEN TIM6EN TIM5EN GPIOELPEN GPIODLPEN TIM6LPEN TIM5LPEN Reserved INCSTEP MODPER Reserved Reserved TIM4EN TIM3EN GPIOCLPEN GPIOBLPEN Reserved TIM4LPEN TIM3LPEN TIM2EN TIM8EN TIM1EN GPIOALPEN DCMILPEN FSMCLPEN TIM2LPEN TIM8LPEN TIM1LPEN LSEBYP LSERDY LSEON PLLI2SRx Reserved PLLI2SNx Reserved LSIRDY LSION
Reset and clock control for (RCC) <strong>RM0090</strong> Table 26. RCC register map and reset values for STM32F42x and STM32F43x Addr. offset Register name 31 0x00 RCC_CR Reserved 0x04 RCC_PLLCF GR 0x08 RCC_CFGR MCO2 1 MCO2 0 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved MCO2PRE2 MCO2PRE1 PLL I2SRDY PLL I2SON PLLQ 3 PLLQ 2 MCO2PRE0 MCO1PRE2 0x0C RCC_CIR Reserved 0x10 0x14 0x18 RCC_AHB1R STR RCC_AHB2R STR RCC_AHB3R STR Reserved OTGHSRST Reserved PLL RDY PLL ON PLLQ 1 PLLQ 0 MCO1PRE1 MCO1PRE0 Reserved PLLSRC I2SSRC MCO1 1 Reserved MCO1 0 RTCPRE 4 CSSON HSEBYP Reserved RTCPRE 3 RTCPRE 2 HSERDY HSEON PLLP 1 PLLP 0 RTCPRE 1 RTCPRE 0 183/1416 Doc ID 018909 Rev 3 ETHMACRST Reserved CSSC Reserved DMA2RST DMA1RST PLLI2SRDYC PLLRDYC HSERDYC HSIRDYC Reserved LSERDYC LSIRDYC Reserved HSICAL 7 HSICAL 6 Reserved PLLN 8 PPRE2 2 PPRE2 1 Reserved 0x1C Reserved Reserved 0x20 0x24 RCC_APB1R STR RCC_APB2R STR UART8RST UART7RST DACRST PWRRST Reserved CAN2RST Reserved CAN1RST Reserved I2C3RST I2C2RST I2C1RST SPI6RST SPI5RST UART5RST UART4RST Reserved TIM11RST Reserved UART3RST UART2RST Reserved SPI3RST SPI2RST TIM10RST TIM9RST Reserved 0x28 Reserved Reserved 0x2C Reserved Reserved 0x30 0x34 0x38 RCC_AHB1E NR RCC_AHB2E NR RCC_AHB3E NR Reserved OTGHSULPIEN OTGHSEN ETHMACPTPEN ETHMACRXEN ETHMACTXEN ETHMACEN Reserved DMA2EN DMA1EN CCMDATARAMEN Reserved Reserved BKPSRAMEN Reserved Reserved 0x3C Reserved Reserved 0x40 RCC_APB1E NR SPI8EN SPI7EN DACEN PWREN Reserved CAN2EN CAN1EN Reserved I2C3EN I2C2EN I2C1EN UART5EN UART4EN USART3EN USART2EN Reserved SPI3EN SYSCFGRST SPI2EN HSICAL 5 HSICAL 4 PLLN 7 PLLN 6 PPRE2 0 PPRE1 2 PLLI2SRDYIE PLLRDYIE Reserved CRCRST SP45RST SPI1RST Reserved CRCEN HSICAL 3 HSICAL 2 PLLN 5 PLLN 4 PPRE1 1 PPRE1 0 HSERDYIE HSIRDYIE WWDGRST SDIORST WWDGEN Reserved Reserved Reserved Reserved Reserved HSICAL 1 HSICAL 0 PLLN 3 PLLN 2 Reserved LSERDYIE LSIRDYIE HSITRIM 4 HSITRIM 3 PLLN 1 PLLN 0 HPRE 3 HPRE 2 CSSF GPIOIRST GPIOHRST TIM14RST TIM13RST ADCRST GPIOIEN GPIOHEN TIM14EN TIM13EN Reserved GPIOGRST GPIOFRST HSITRIM 2 HSITRIM 1 PLLM 5 PLLM 4 HSITRIM 0 Reserved HSIRDY HSION PLLM 3 PLLM 2 PLLM 1 PLLM 0 HPRE 1 HPRE 0 SWS 1 SWS 0 SW 1 SW 0 PLLI2SRDYF PLLRDYF OTGFSRST RNGRST HSAHRST CRYPRST Reserved TIM12RST TIM7RST GPIOGEN GPIOFEN USART6RST USART1RST OTGFSEN RNGEN HASHEN CRYPEN TIM12EN TIM7EN GPIOERST GPIODRST TIM6RST TIM5RST GPIOEEN GPIODEN TIM6EN TIM5EN HSERDYF HSIRDYF Reserved GPIOCRST GPIOBRST Reserved TIM4RST TIM3RST GPIOCEN GPIOBEN Reserved TIM4EN TIM3EN LSERDYF LSIRDYF GPIOARST DCMIRST FSMCRST TIM2RST TIM8RST TIM1RST GPIOAEN DCMIEN FSMCEN TIM2EN
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RM0090 Reference manual STM32F40x,
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Contents RM0090 3.5.3 Erase . . . .
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Contents RM0090 6.3.1 RCC clock con
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Contents RM0090 7.4.7 GPIO port bit
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Contents RM0090 10.3.4 Falling trig
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Contents RM0090 12.4.2 Independent
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Contents RM0090 14.3.3 Repetition c
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Contents RM0090 15.4.12 TIMx auto-r
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Contents RM0090 17.4.6 TIM6&TIM7 co
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Contents RM0090 22.1 HASH introduct
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Contents RM0090 24.3.3 Tx mailboxes
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Contents RM0090 26.3.14 Hardware fl
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Contents RM0090 28.4.13 SD I/O mode
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Contents RM0090 29.7 Ethernet inter
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Contents RM0090 31.3.1 High-speed O
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Contents RM0090 33.2 Reference ARM
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List of tables RM0090 List of table
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List of tables RM0090 Table 98. Tra
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List of tables RM0090 Table 192. NO
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List of figures RM0090 Figure 49. A
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List of figures RM0090 Figure 151.
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Documentation conventions RM0090 1
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Memory and bus architecture RM0090
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Embedded Flash memory interface RM0
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CRC calculation unit RM0090 4 CRC c
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CRC calculation unit RM0090 Bits 7:
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Power control (PWR) RM0090 Figure 7
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Power control (PWR) RM0090 When the
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Power control (PWR) RM0090 mode (se
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Power control (PWR) RM0090 A PVDO f
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Power control (PWR) RM0090 5.3.3 Sl
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Power control (PWR) RM0090 If an ac
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Power control (PWR) RM0090 I/O stat
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Power control (PWR) RM0090 Safe RTC
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Power control (PWR) RM0090 Bit 4 PV
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Power control (PWR) RM0090 5.4.3 PW
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Reset and clock control for (RCC) R
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DMA controller (DMA) RM0090 9.4 DMA
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DMA controller (DMA) RM0090 Bits 25
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DMA controller (DMA) RM0090 9.5.5 D
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DMA controller (DMA) RM0090 Bits 8
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DMA controller (DMA) RM0090 15 14 1
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DMA controller (DMA) RM0090 9.5.11
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DMA controller (DMA) RM0090 Table 4
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Interrupts and events RM0090 10 Int
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Interrupts and events RM0090 Table
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Interrupts and events RM0090 genera
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Interrupts and events RM0090 10.3 E
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Interrupts and events RM0090 15 14
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Analog-to-digital converter (ADC) R
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Digital-to-analog converter (DAC) R
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Digital camera interface (DCMI) RM0
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Basic timers (TIM6&TIM7) RM0090 17
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Basic timers (TIM6&TIM7) RM0090 Fig
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Basic timers (TIM6&TIM7) RM0090 17.
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Independent watchdog (IWDG) RM0090
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Independent watchdog (IWDG) RM0090
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Window watchdog (WWDG) RM0090 19 Wi
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Window watchdog (WWDG) RM0090 case,
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Window watchdog (WWDG) RM0090 19.6
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Window watchdog (WWDG) RM0090 19.6.
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Cryptographic processor (CRYP) RM00
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Random number generator (RNG) RM009
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Hash processor (HASH) RM0090 22.3 H
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Hash processor (HASH) RM0090 has le
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Hash processor (HASH) RM0090 The le
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Hash processor (HASH) RM0090 with v
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Hash processor (HASH) RM0090 Proced
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Hash processor (HASH) RM0090 Bit 12
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Hash processor (HASH) RM0090 22.4.2
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Hash processor (HASH) RM0090 Bit 3
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Hash processor (HASH) RM0090 HASH_H
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Hash processor (HASH) RM0090 Table
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Real-time clock (RTC) RM0090 23.2 R
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Real-time clock (RTC) RM0090 The as
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Real-time clock (RTC) RM0090 23.3.5
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Real-time clock (RTC) RM0090 RTC_TR
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Real-time clock (RTC) RM0090 window
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Debug support (DBG) RM0090 33 Debug
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Debug support (DBG) RM0090 Figure 4
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Debug support (DBG) RM0090 33.4.3 I
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Debug support (DBG) RM0090 Figure 4
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Debug support (DBG) RM0090 Only the
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Debug support (DBG) RM0090 Table 22
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Debug support (DBG) RM0090 Note: No
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Debug support (DBG) RM0090 33.9 AHB
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Debug support (DBG) RM0090 33.11 Ca
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Debug support (DBG) RM0090 For this
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Debug support (DBG) RM0090 33.15.3
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Debug support (DBG) RM0090 31 30 29
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Debug support (DBG) RM0090 Bit 20:1
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Device electronic signature RM0090
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A ADC_CCR . . . . . . . . . . . . .
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DMA_SxM1AR . . . . . . . . . . . .
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HASH_SR . . . . . . . . . . . . . .
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RNG_DR . . . . . . . . . . . . . .
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Revision history RM0090 Revision hi
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Revision history RM0090 Table 238.
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RM0090: Reference manual - STMicroelectronics

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