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RM0090: Reference manual - STMicroelectronics

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<strong>RM0090</strong> Universal synchronous asynchronous receiver transmitter (USART)<br />

RTS flow control<br />

If the RTS flow control is enabled (RTSE=1), then nRTS is asserted (tied low) as long as the<br />

USART receiver is ready to receive a new data. When the receive register is full, nRTS is<br />

deasserted, indicating that the transmission is expected to stop at the end of the current<br />

frame. Figure 267 shows an example of communication with RTS flow control enabled.<br />

Figure 267. RTS flow control<br />

RX<br />

nRTS<br />

Start<br />

Bit<br />

CTS flow control<br />

If the CTS flow control is enabled (CTSE=1), then the transmitter checks the nCTS input<br />

before transmitting the next frame. If nCTS is asserted (tied low), then the next data is<br />

transmitted (assuming that a data is to be transmitted, in other words, if TXE=0), else the<br />

transmission does not occur. When nCTS is deasserted during a transmission, the current<br />

transmission is completed before the transmitter stops.<br />

When CTSE=1, the CTSIF status bit is automatically set by hardware as soon as the nCTS<br />

input toggles. It indicates when the receiver becomes ready or not ready for communication.<br />

An interrupt is generated if the CTSIE bit in the USART_CR3 register is set. The figure<br />

below shows an example of communication with CTS flow control enabled.<br />

Figure 268. CTS flow control<br />

nCTS<br />

TX<br />

Data 1<br />

Start<br />

Bit<br />

Stop<br />

Bit<br />

Data 1<br />

Stop<br />

Idle<br />

Bit<br />

Start<br />

Bit<br />

Note: Special behavior of break frames: when the CTS flow is enabled, the transmitter does not<br />

check the nCTS input state to send a break.<br />

Data 2<br />

RXNE Data 1 read RXNE<br />

Data 2 can now be transmitted<br />

Transmit data register<br />

TDR Data 2 empty Data 3<br />

empty<br />

Writing data 3 in TDR<br />

CTS<br />

Data 2<br />

Stop<br />

Idle<br />

Bit<br />

Start<br />

Bit<br />

Transmission of Data 3<br />

is delayed until nCTS = 0<br />

CTS<br />

Data 3<br />

Stop<br />

Bit<br />

Doc ID 018909 Rev 3 776/1416

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