RM0090: Reference manual - STMicroelectronics

USB on-the-go high-speed (OTG_HS) RM0090
1. Program the GINTMSK register to unmask the following:
2. Channel interrupt
– Nonperiodic transmit FIFO empty for OUT transactions (applicable for Slave mode
that operates in pipelined transaction-level with the packet count field programmed
with more than one).
– Nonperiodic transmit FIFO half-empty for OUT transactions (applicable for Slave
mode that operates in pipelined transaction-level with the packet count field
programmed with more than one).
3. Program the OTG_HS_HAINTMSK register to unmask the selected channels’
interrupts.
4. Program the OTG_HS_HCINTMSK register to unmask the transaction-related
interrupts of interest given in the host channel interrupt register.
5. Program the selected channel’s OTG_HS_HCTSIZx register with the total transfer size,
in bytes, and the expected number of packets, including short packets. The application
must program the PID field with the initial data PID (to be used on the first OUT
transaction or to be expected from the first IN transaction).
6. Program the selected channels in the OTG_HS_HCSPLTx register(s) with the hub and
port addresses (split transactions only).
7. Program the selected channels in the HCDMAx register(s) with the buffer start address.
8. Program the OTG_HS_HCCHARx register of the selected channel with the device’s
endpoint characteristics, such as type, speed, direction, and so forth. (The channel can
be enabled by setting the channel enable bit to 1 only when the application is ready to
transmit or receive any packet).
Halting a channel
The application can disable any channel by programming the OTG_HS_HCCHARx register
with the CHDIS and CHENA bits set to 1. This enables the OTG_HS host to flush the posted
requests (if any) and generates a channel halted interrupt. The application must wait for the
CHH interrupt in OTG_HS_HCINTx before reallocating the channel for other transactions.
The OTG_HS host does not interrupt the transaction that has already been started on the
USB.
To disable a channel in DMA mode operation, the application does not need to check for
space in the request queue. The OTG_HS host checks for space to write the disable request
on the disabled channel’s turn during arbitration. Meanwhile, all posted requests are
dropped from the request queue when the CHDIS bit in HCCHARx is set to 1.
Before disabling a channel, the application must ensure that there is at least one free space
available in the nonperiodic request queue (when disabling a nonperiodic channel) or the
periodic request queue (when disabling a periodic channel). The application can simply
flush the posted requests when the Request queue is full (before disabling the channel), by
programming the OTG_HS_HCCHARx register with the CHDIS bit set to 1, and the CHENA
bit cleared to 0.
The application is expected to disable a channel on any of the following conditions:
1. When an XFRC interrupt in OTG_HS_HCINTx is received during a nonperiodic IN
transfer or high-bandwidth interrupt IN transfer (Slave mode only)
2. When an STALL, TXERR, BBERR or DTERR interrupt in OTG_HS_HCINTx is received
for an IN or OUT channel (Slave mode only). For high-bandwidth interrupt INs in Slave
mode, once the application has received a DTERR interrupt it must disable the channel
1259/1416 Doc ID 018909 Rev 3