RM0090: Reference manual - STMicroelectronics

Flexible static memory controller (FSMC) RM0090
Table 196. FSMC_BTRx bit fields
Bit
number
Bit name Value to set
31-30 0x0
29-28 ACCMOD 0x0
27-20 0x000
19-16 BUSTURN Time between NEx high to NEx low (BUSTURN HCLK)
15-8 DATAST Duration of the second access phase (DATAST HCLK cycles) in read.
7-4 0x0
3-0 ADDSET
Table 197. FSMC_BWTRx bit fields
Bit
number
1327/1416 Doc ID 018909 Rev 3
Duration of the first access phase (ADDSET HCLK cycles) in read.
Minimum value for ADDSET is 0.
Bit name Value to set
31-30 0x0
29-28 ACCMOD 0x0
27-20 0x000
19-16 BUSTURN Time between NEx high to NEx low (BUSTURN HCLK).
15-8 DATAST
Duration of the second access phase (DATAST+1 HCLK cycles) in
write.
7-4 0x0
3-0 ADDSET
Duration of the first access phase (ADDSET HCLK cycles) in write
Minimum value for ADDSET is 0.