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RM0090: Reference manual - STMicroelectronics

RM0090: Reference manual - STMicroelectronics

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<strong>RM0090</strong> USB on-the-go full-speed (OTG_FS)<br />

(IISOOXFRM in OTG_FS_GINTSTS), indicating that an XFRC interrupt (in<br />

OTG_FS_DOEPINTx) is not asserted on at least one of the isochronous OUT<br />

endpoints. At this point, the endpoint with the incomplete transfer remains enabled, but<br />

no active transfers remain in progress on this endpoint on the USB.<br />

Application programming sequence:<br />

1. Asserting the IISOOXFRM interrupt (OTG_FS_GINTSTS) indicates that in the current<br />

frame, at least one isochronous OUT endpoint has an incomplete transfer.<br />

2. If this occurs because isochronous OUT data is not completely emptied from the<br />

endpoint, the application must ensure that the application empties all isochronous OUT<br />

data (data and status) from the receive FIFO before proceeding.<br />

– When all data are emptied from the receive FIFO, the application can detect the<br />

XFRC interrupt (OTG_FS_DOEPINTx). In this case, the application must reenable<br />

the endpoint to receive isochronous OUT data in the next frame.<br />

3. When it receives an IISOOXFRM interrupt (in OTG_FS_GINTSTS), the application<br />

must read the control registers of all isochronous OUT endpoints<br />

(OTG_FS_DOEPCTLx) to determine which endpoints had an incomplete transfer in the<br />

current microframe. An endpoint transfer is incomplete if both the following conditions<br />

are met:<br />

– EONUM bit (in OTG_FS_DOEPCTLx) = SOFFN[0] (in OTG_FS_DSTS)<br />

– EPENA = 1 (in OTG_FS_DOEPCTLx)<br />

4. The previous step must be performed before the SOF interrupt (in OTG_FS_GINTSTS)<br />

is detected, to ensure that the current frame number is not changed.<br />

5. For isochronous OUT endpoints with incomplete transfers, the application must discard<br />

the data in the memory and disable the endpoint by setting the EPDIS bit in<br />

OTG_FS_DOEPCTLx.<br />

6. Wait for the EPDIS interrupt (in OTG_FS_DOEPINTx) and enable the endpoint to<br />

receive new data in the next frame.<br />

– Because the core can take some time to disable the endpoint, the application may<br />

not be able to receive the data in the next frame after receiving bad isochronous<br />

data.<br />

● Stalling a non-isochronous OUT endpoint<br />

This section describes how the application can stall a non-isochronous endpoint.<br />

1. Put the core in the Global OUT NAK mode.<br />

2. Disable the required endpoint<br />

– When disabling the endpoint, instead of setting the SNAK bit in<br />

OTG_FS_DOEPCTL, set STALL = 1 (in OTG_FS_DOEPCTL).<br />

The STALL bit always takes precedence over the NAK bit.<br />

3. When the application is ready to end the STALL handshake for the endpoint, the STALL<br />

bit (in OTG_FS_DOEPCTLx) must be cleared.<br />

4. If the application is setting or clearing a STALL for an endpoint due to a<br />

SetFeature.Endpoint Halt or ClearFeature.Endpoint Halt command, the STALL bit must<br />

be set or cleared before the application sets up the Status stage transfer on the control<br />

endpoint.<br />

Doc ID 018909 Rev 3 1138/1416

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