RM0090: Reference manual - STMicroelectronics

USB on-the-go high-speed (OTG_HS) RM0090
This section describes a regular nonisochronous OUT data transfer (control, bulk, or
interrupt).
Application requirements:
1. Before setting up an OUT transfer, the application must allocate a buffer in the memory
to accommodate all data to be received as part of the OUT transfer.
2. For OUT transfers, the transfer size field in the endpoint’s transfer size register must be
a multiple of the maximum packet size of the endpoint, adjusted to the DWORD
boundary.
– transfer size[EPNUM] = n × (MPSIZ[EPNUM] + 4 – (MPSIZ[EPNUM] mod 4))
– packet count[EPNUM] = n
– n > 0
3. On any OUT endpoint interrupt, the application must read the endpoint’s transfer size
register to calculate the size of the payload in the memory. The received payload size
can be less than the programmed transfer size.
– Payload size in memory = application programmed initial transfer size – core
updated final transfer size
– Number of USB packets in which this payload was received = application
programmed initial packet count – core updated final packet count
Internal data flow:
1. The application must set the transfer size and packet count fields in the endpointspecific
registers, clear the NAK bit, and enable the endpoint to receive the data.
2. Once the NAK bit is cleared, the core starts receiving data and writes it to the receive
FIFO, as long as there is space in the receive FIFO. For every data packet received on
the USB, the data packet and its status are written to the receive FIFO. Every packet
(maximum packet size or short packet) written to the receive FIFO decrements the
packet count field for that endpoint by 1.
– OUT data packets received with bad data CRC are flushed from the receive FIFO
automatically.
– After sending an ACK for the packet on the USB, the core discards
nonisochronous OUT data packets that the host, which cannot detect the ACK, resends.
The application does not detect multiple back-to-back data OUT packets
on the same endpoint with the same data PID. In this case the packet count is not
decremented.
– If there is no space in the receive FIFO, isochronous or nonisochronous data
packets are ignored and not written to the receive FIFO. Additionally,
nonisochronous OUT tokens receive a NAK handshake reply.
– In all the above three cases, the packet count is not decremented because no data
are written to the receive FIFO.
3. When the packet count becomes 0 or when a short packet is received on the endpoint,
the NAK bit for that endpoint is set. Once the NAK bit is set, the isochronous or
nonisochronous data packets are ignored and not written to the receive FIFO, and
nonisochronous OUT tokens receive a NAK handshake reply.
4. After the data are written to the receive FIFO, the application reads the data from the
receive FIFO and writes it to external memory, one packet at a time per endpoint.
5. At the end of every packet write on the AHB to external memory, the transfer size for
the endpoint is decremented by the size of the written packet.
1293/1416 Doc ID 018909 Rev 3