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RM0090: Reference manual - STMicroelectronics

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Revision history <strong>RM0090</strong><br />

Table 238. Document revision history<br />

Date Version Changes<br />

19-Oct-2012<br />

2<br />

(continued)<br />

1413/1416 Doc ID 018909 Rev 3<br />

SPI/I2S:<br />

Updated Section 27.1: SPI introduction.<br />

Changed I2S simplex communication/mode to half-duplex<br />

communication/mode. Updated flags in reception/transmission<br />

modes in Section 27.2.2: I2S features. Added Frame error flag in<br />

Table 124: I2S interrupt requests.<br />

Added register access in Section 27.5: SPI and I2S registers.<br />

Updated ERRIE definition in Section 27.5.2: SPI control register 2<br />

(SPI_CR2).<br />

Renamed TIFRFE to FRE and definition updated in Section 27.5.3:<br />

SPI status register (SPI_SR).<br />

SDIO:<br />

Updated value and description for bits [45:40] and [7:1] in Table 152:<br />

R4 response. Updated value at bits [45:40] in Table 154: R5<br />

response.<br />

CAN:<br />

Updated Figure 224: Dual CAN block diagram.<br />

Modified definition of CAN2SB bits in Section : CAN filter master<br />

register (CAN_FMR).<br />

Added register access in Section 24.9: CAN registers<br />

ETHERNET:<br />

Updated standard for precision networked clock synchronization in<br />

Section 29.1: Ethernet introduction and Section 29.2.1: MAC core<br />

features.<br />

Updated CR bit definition in Section : Ethernet MAC MII address<br />

register (ETH_MACMIIAR).<br />

Replace RTPR by PM bit in Table 165: Source address filtering.<br />

USB OTG FS<br />

Updated remote wakeup signaling bit and the resume<br />

interrupt in Section : Suspended state.<br />

Added peripheral register access in Section 30.16: OTG_FS control<br />

and status registerss.<br />

Updated INEPTXSA description in OTG_FS_DIEPTXFx.<br />

Changed PHYSEL from bit 7 to bit 6 of the OTG_FS_GUSBCFG<br />

register.

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