RM0090: Reference manual - STMicroelectronics

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<strong>RM0090</strong> General-purpose timers (TIM2 to TIM5) 15 General-purpose timers (TIM2 to TIM5) This section applies to the whole STM32F4xx family, unless otherwise specified. 15.1 TIM2 to TIM5 introduction The general-purpose timers consist of a 16-bit or 32-bit auto-reload counter driven by a programmable prescaler. They may be used for a variety of purposes, including measuring the pulse lengths of input signals (input capture) or generating output waveforms (output compare and PWM). Pulse lengths and waveform periods can be modulated from a few microseconds to several milliseconds using the timer prescaler and the RCC clock controller prescalers. The timers are completely independent, and do not share any resources. They can be synchronized together as described in Section 15.3.15. 15.2 TIM2 to TIM5 main features General-purpose TIMx timer features include: ● 16-bit (TIM3 and TIM4) or 32-bit (TIM2 and TIM5) up, down, up/down auto-reload counter. ● 16-bit programmable prescaler used to divide (also “on the fly”) the counter clock frequency by any factor between 1 and 65536. ● Up to 4 independent channels for: – Input capture – Output compare – PWM generation (Edge- and Center-aligned modes) – One-pulse mode output ● Synchronization circuit to control the timer with external signals and to interconnect several timers. ● Interrupt/DMA generation on the following events: – Update: counter overflow/underflow, counter initialization (by software or internal/external trigger) – Trigger event (counter start, stop, initialization or count by internal/external trigger) – Input capture – Output compare ● Supports incremental (quadrature) encoder and hall-sensor circuitry for positioning purposes ● Trigger input for external clock or cycle-by-cycle current management Doc ID 018909 Rev 3 418/1416
General-purpose timers (TIM2 to TIM5) <strong>RM0090</strong> Figure 119. General-purpose timer block diagram TIMx_ETR TIMx_CH1 TIMx_CH2 TIMx_CH3 TIMx_CH4 Reg XOR Notes: event TI3 TI1 TI2 TI4 15.3 TIM2 to TIM5 functional description 15.3.1 Time-base unit TIMxCLK from RCC The main block of the programmable timer is a 16-bit/32-bit counter with its related autoreload register. The counter can count up. The counter clock can be divided by a prescaler. The counter, the auto-reload register and the prescaler register can be written or read by software. This is true even when the counter is running. The time-base unit includes: ● Counter Register (TIMx_CNT) ● Prescaler Register (TIMx_PSC): ● Auto-Reload Register (TIMx_ARR) 419/1416 Doc ID 018909 Rev 3 ITR0 ITR1 ITR2 ITR3 Input filter & edge detector Preload registers transferred to active registers on U event according to control bit interrupt & DMA output ETR Input filter & edge detector Input filter & edge detector Input filter & edge detector Internal Clock (CK_INT) TI1FP1 TI2FP2 U Autoreload register Stop, clear or up/down CK_PSC PSC Prescaler CK_CNT +/- CNT counter CC1I TI1FP1 TI1FP2 IC1 U IC1PS Prescaler Capture/compare 1 register TRC TI2FP1 TI2FP2 TRC TI3FP3 TI3FP4 TRC TI4FP3 TI4FP4 TRC Polarity selection & edge detector & prescaler IC2 IC3 IC4 ITR TI1F_ED ETRP Input filter TRC CC2I IC2PS U Prescaler CC3I U IC3PS Prescaler CC4I U IC4PS Prescaler ETRF TRGI TGI Trigger controller Encoder Interface Capture/compare 2 register Capture/compare 3 register Capture/compare 4 register ETRF Slave mode controller U TRGO Reset, enable, up/down, count, UI CC1I OC1REF CC2I OC2REF CC3I OC3REF CC4I OC4REF to other timers to DAC/ADC output control output control output control output control OC1 OC2 OC3 OC4 TIMx_CH1 TIMx_CH2 TIMx_CH3 TIMx_CH4
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RM0090 Reference manual STM32F40x,
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List of tables RM0090 List of table
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Memory and bus architecture RM0090
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Debug support (DBG) RM0090 33 Debug
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Device electronic signature RM0090
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A ADC_CCR . . . . . . . . . . . . .
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DMA_SxM1AR . . . . . . . . . . . .
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HASH_SR . . . . . . . . . . . . . .
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Revision history RM0090 Revision hi
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Revision history RM0090 Table 238.
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