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RM0090: Reference manual - STMicroelectronics

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USB on-the-go full-speed (OTG_FS) <strong>RM0090</strong><br />

Figure 373. Processing a SETUP packet<br />

setup_np_in_pkt<br />

Data IN phase<br />

● Handling more than three back-to-back SETUP packets<br />

Per the USB 2.0 specification, normally, during a SETUP packet error, a host does not send<br />

more than three back-to-back SETUP packets to the same endpoint. However, the USB 2.0<br />

specification does not limit the number of back-to-back SETUP packets a host can send to<br />

the same endpoint. When this condition occurs, the OTG_FS controller generates an<br />

interrupt (B2BSTUP in OTG_FS_DOEPINTx).<br />

● Setting the global OUT NAK<br />

Internal data flow:<br />

1. When the application sets the Global OUT NAK (SGONAK bit in OTG_FS_DCTL), the<br />

core stops writing data, except SETUP packets, to the receive FIFO. Irrespective of the<br />

space availability in the receive FIFO, non-isochronous OUT tokens receive a NAK<br />

handshake response, and the core ignores isochronous OUT data packets<br />

2. The core writes the Global OUT NAK pattern to the receive FIFO. The application must<br />

reserve enough receive FIFO space to write this data pattern.<br />

3. When the application pops the Global OUT NAK pattern Word from the receive FIFO,<br />

the core sets the GONAKEFF interrupt (OTG_FS_GINTSTS).<br />

4. Once the application detects this interrupt, it can assume that the core is in Global OUT<br />

NAK mode. The application can clear this interrupt by clearing the SGONAK bit in<br />

OTG_FS_DCTL.<br />

Application programming sequence<br />

Wait for STUP in OTG_FS_DOEPINTx<br />

rem_supcnt =<br />

rd_reg(DOEPTSIZx)<br />

setup_cmd[31:0] = mem[4 – 2 * rem_supcnt]<br />

setup_cmd[63:32] = mem[5 – 2 * rem_supcnt]<br />

Read<br />

Find setup cmd type<br />

ctrl-rd/wr/2 stage<br />

2-stage<br />

setup_np_in_pkt<br />

Status IN phase<br />

1133/1416 Doc ID 018909 Rev 3<br />

Write<br />

rcv_out_pkt<br />

Data OUT phase<br />

ai15678

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