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<strong>International</strong> <strong>Teacher</strong> <strong>Education</strong> <strong>Conference</strong> <strong>2014</strong><br />

Figure 4. The test run results for the voltage processor. Input voltage signal (the toppest curve), integrator<br />

output (the middle curve) and derivator output (the lowest curve).<br />

I1 = 0<br />

int1<br />

I2 = 1<br />

TD = 1<br />

TR = 1<br />

TF = 1<br />

PER = 2.000001<br />

PW = 1n<br />

I1<br />

I<br />

int2<br />

dv 1<br />

dv 2<br />

into<br />

dv o<br />

V<br />

V<br />

R2<br />

1meg<br />

R1<br />

1meg<br />

current processor<br />

Figure 5. Test connection for the current processor. Compact model is used.<br />

941

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