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Interrupts and events RM0008 Table 52. Vector table for connectivity line devices (continued) Position Priority Type of priority Acronym Description Address -1 fixed HardFault All class of fault 0x0000_000C 0 settable MemManage Memory management 0x0000_0010 1 settable BusFault Pre-fetch fault, memory access fault 0x0000_0014 2 settable UsageFault Undefined instruction or illegal state 0x0000_0018 - - - Reserved 3 settable SVCall System service call via SWI instruction 0x0000_001C - 0x0000_002B 0x0000_002C 4 settable Debug Monitor Debug Monitor 0x0000_0030 - - - Reserved 0x0000_0034 5 settable PendSV Pendable request for system service 0x0000_0038 6 settable SysTick System tick timer 0x0000_003C 0 7 settable WWDG Window Watchdog interrupt 0x0000_0040 1 8 settable PVD PVD through EXTI Line detection interrupt 0x0000_0044 2 9 settable TAMPER Tamper interrupt 0x0000_0048 3 10 settable RTC RTC global interrupt 0x0000_004C 4 11 settable FLASH Flash global interrupt 0x0000_0050 5 12 settable RCC RCC global interrupt 0x0000_0054 6 13 settable EXTI0 EXTI Line0 interrupt 0x0000_0058 7 14 settable EXTI1 EXTI Line1 interrupt 0x0000_005C 8 15 settable EXTI2 EXTI Line2 interrupt 0x0000_0060 9 16 settable EXTI3 EXTI Line3 interrupt 0x0000_0064 10 17 settable EXTI4 EXTI Line4 interrupt 0x0000_0068 11 18 settable DMA1_Channel1 DMA1 Channel1 global interrupt 0x0000_006C 12 19 settable DMA1_Channel2 DMA1 Channel2 global interrupt 0x0000_0070 13 20 settable DMA1_Channel3 DMA1 Channel3 global interrupt 0x0000_0074 14 21 settable DMA1_Channel4 DMA1 Channel4 global interrupt 0x0000_0078 15 22 settable DMA1_Channel5 DMA1 Channel5 global interrupt 0x0000_007C 16 23 settable DMA1_Channel6 DMA1 Channel6 global interrupt 0x0000_0080 17 24 settable DMA1_Channel7 DMA1 Channel7 global interrupt 0x0000_0084 18 25 settable ADC1_2 ADC1 and ADC2 global interrupt 0x0000_0088 19 26 settable CAN1_TX CAN1 TX interrupts 0x0000_008C 20 27 settable CAN1_RX0 CAN1 RX0 interrupts 0x0000_0090 21 28 settable CAN1_RX1 CAN1 RX1 interrupt 0x0000_0094 170/995 Doc ID 13902 Rev 9
RM0008 Interrupts and events Table 52. Vector table for connectivity line devices (continued) Position Priority Type of priority Acronym Description Address 22 29 settable CAN1_SCE CAN1 SCE interrupt 0x0000_0098 23 30 settable EXTI9_5 EXTI Line[9:5] interrupts 0x0000_009C 24 31 settable TIM1_BRK TIM1 Break interrupt 0x0000_00A0 25 32 settable TIM1_UP TIM1 Update interrupt 0x0000_00A4 26 33 settable TIM1_TRG_COM TIM1 Trigger and Commutation interrupts 0x0000_00A8 27 34 settable TIM1_CC TIM1 Capture Compare interrupt 0x0000_00AC 28 35 settable TIM2 TIM2 global interrupt 0x0000_00B0 29 36 settable TIM3 TIM3 global interrupt 0x0000_00B4 30 37 settable TIM4 TIM4 global interrupt 0x0000_00B8 31 38 settable I2C1_EV I 2 C1 event interrupt 0x0000_00BC 32 39 settable I2C1_ER I 2 C1 error interrupt 0x0000_00C0 33 40 settable I2C2_EV I 2 C2 event interrupt 0x0000_00C4 34 41 settable I2C2_ER I 2 C2 error interrupt 0x0000_00C8 35 42 settable SPI1 SPI1 global interrupt 0x0000_00CC 36 43 settable SPI2 SPI2 global interrupt 0x0000_00D0 37 44 settable USART1 USART1 global interrupt 0x0000_00D4 38 45 settable USART2 USART2 global interrupt 0x0000_00D8 39 46 settable USART3 USART3 global interrupt 0x0000_00DC 40 47 settable EXTI15_10 EXTI Line[15:10] interrupts 0x0000_00E0 41 48 settable RTCAlarm 42 49 settable OTG_FS_WKUP - - - - Reserved RTC alarm through EXTI line interrupt USB On-The-Go FS Wakeup through EXTI line interrupt 0x0000_00E4 0x0000_00E8 0x0000_00EC - 0x0000_0104 50 57 settable TIM5 TIM5 global interrupt 0x0000_0108 51 58 settable SPI3 SPI3 global interrupt 0x0000_010C 52 59 settable UART4 UART4 global interrupt 0x0000_0110 53 60 settable UART5 UART5 global interrupt 0x0000_0114 54 61 settable TIM6 TIM6 global interrupt 0x0000_0118 55 62 settable TIM7 TIM7 global interrupt 0x0000_011C 56 63 settable DMA2_Channel1 DMA2 Channel1 global interrupt 0x0000_0120 57 64 settable DMA2_Channel2 DMA2 Channel2 global interrupt 0x0000_0124 58 65 settable DMA2_Channel3 DMA2 Channel3 global interrupt 0x0000_0128 Doc ID 13902 Rev 9 171/995
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RM0008 Reference manual STM32F101xx
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RM0008 Contents 4.3.1 Slowing down
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RM0008 Contents 7.3.4 APB2 peripher
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RM0008 Contents 10.1 DMA introducti
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RM0008 Contents 12.3.2 DAC output b
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RM0008 Contents 13.4.6 TIM1&TIM8 ev
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RM0008 Contents 15.4.8 TIM6&TIM7 au
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RM0008 Contents 20 Secure digital i
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RM0008 Contents 21.5.2 Endpoint-spe
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RM0008 Contents 23.5.10 SPI registe
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RM0008 Contents 26.5 USB peripheral
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RM0008 Contents 27.7 Ethernet inter
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RM0008 List of tables List of table
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RM0008 List of tables Table 100. FS
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RM0008 List of tables Table 202. Pa
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RM0008 List of figures Figure 49. D
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RM0008 List of figures preloaded).
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RM0008 List of figures Figure 255.
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RM0008 Documentation conventions 1
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RM0008 Memory and bus architecture
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RM0008 CRC calculation unit 3.3 CRC
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RM0008 Power control (PWR) 4 Power
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RM0008 Power control (PWR) Note: Du
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RM0008 Power control (PWR) 4.3 Low-
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RM0008 Power control (PWR) Table 9.
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RM0008 Power control (PWR) switched
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RM0008 Power control (PWR) Bit 8 DB
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RM0008 Power control (PWR) 4.4.3 PW
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RM0008 Backup registers (BKP) 5.3 B
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RM0008 Backup registers (BKP) Bit 6
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RM0008 Backup registers (BKP) Table
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RM0008 Backup registers (BKP) Table
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RM0008 Low-, medium- and high-densi
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RM0008 Connectivity line devices: r
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RM0008 Analog-to-digital converter
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RM0008 Digital-to-analog converter
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RM0008 Basic timers (TIM6&TIM7) 15
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RM0008 Basic timers (TIM6&TIM7) Pre
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RM0008 Basic timers (TIM6&TIM7) Fig
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RM0008 Basic timers (TIM6&TIM7) Fig
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RM0008 Basic timers (TIM6&TIM7) 15.
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RM0008 Basic timers (TIM6&TIM7) 15.
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RM0008 Real-time clock (RTC) 16 Rea
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RM0008 Real-time clock (RTC) Figure
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RM0008 Real-time clock (RTC) 16.3.5
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RM0008 Real-time clock (RTC) RTC pr
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RM0008 Independent watchdog (IWDG)
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RM0008 Window watchdog (WWDG) Figur
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RM0008 Window watchdog (WWDG) 18.6
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RM0008 Ethernet (ETH): media access
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RM0008 Device electronic signature
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RM0008 Device electronic signature
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RM0008 Debug support (DBG) Figure 3
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RM0008 Debug support (DBG) JTAG-DP
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RM0008 Debug support (DBG) Note: On
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RM0008 Debug support (DBG) DBGMCU_I
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RM0008 Revision history 30 Revision
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RM0008 Revision history Table 215.
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RM0008 Index ETH_MACMIIDR . . . . .
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RM0008 Please Read Carefully: Infor
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