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STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

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RM0008<br />

Controller area network (bxCAN)<br />

Table 162.<br />

Transmit mailbox mapping<br />

Offset to transmit mailbox base address<br />

Register name<br />

0 CAN_TIxR<br />

4 CAN_TDTxR<br />

8 CAN_TDLxR<br />

12 CAN_TDHxR<br />

Receive mailbox<br />

When a message has been received, it is available to the software in the FIFO output<br />

mailbox. Once the software has h<strong>and</strong>led the message (e.g. read it) the software must<br />

release the FIFO output mailbox by means of the RFOM bit in the CAN_RFR register to<br />

make the next incoming message available. The filter match index is stored in the MFMI field<br />

of the CAN_RDTxR register. The 16-bit time stamp value is stored in the TIME[15:0] field of<br />

CAN_RDTxR.<br />

Table 163.<br />

Receive mailbox mapping<br />

Offset to receive mailbox base<br />

address (bytes)<br />

Register name<br />

0 CAN_RIxR<br />

4 CAN_RDTxR<br />

8 CAN_RDLxR<br />

12 CAN_RDHxR<br />

Figure 203. CAN error state diagram<br />

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Doc ID 13902 Rev 9 557/995

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