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STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

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USB on-the-go full-speed (OTG_FS)<br />

RM0008<br />

entries) = 512 bytes of USB bulk traffic can be scheduled by the application <strong>and</strong><br />

autonomously executed by the host at the maximum full-speed data rate without any<br />

application intervention.<br />

● To post an out periodic (nonperiodic) transaction request to the host scheduler the<br />

application has to:<br />

– configure the transfer parameters on an available host channel<br />

– enable the configured channel<br />

– check that there is at least 1 entry available in the periodic (nonperiodic) request<br />

queue by reading the HPTXSTS bit in the OTG_FS_GNPTXSTS register<br />

– check that there is enough FIFO space in the periodic (nonperiodic) Tx FIFO (see<br />

Section 26.11.2: Host Tx FIFOs) by reading the HPTXSTS (GNPTXSTS) register.<br />

This step may not be necessary if the application submits the host transaction<br />

request upon reception of the periodic (nonperiodic) Tx FIFO half or completely<br />

empty interrupt<br />

– push the data payload to the associated FIFO address (push register). There is<br />

one push register for each enabled host channel. The data payload is<br />

automatically redirected to the periodic or nonperiodic Tx FIFO according to the<br />

host channel EPTYP bitfield in the OTG_FS_HCCHARx register. When the last<br />

32-bit word data are written to the FIFO, an active entry is inserted at the bottom of<br />

the periodic (nonperiodic) request queue <strong>and</strong> the transaction request is scheduled<br />

for execution<br />

● To post an IN periodic (nonperiodic) transaction request to the host scheduler the<br />

application has to:<br />

– configure the transfer parameters on an available host channel<br />

– enable the configured channel with the channel enable bit in the host channel<br />

characteristics register (CHENA bit in OTG_FS_HCCHARx). This inserts an active<br />

entry at the bottom of the periodic (nonperiodic) request queue <strong>and</strong> the<br />

transaction request is scheduled for execution<br />

26.7 SOF trigger<br />

Figure 264. SOF connectivity<br />

<strong>STM32F105xx</strong><br />

STM32F107xx<br />

PA8<br />

SOF pulse output, to<br />

external audio control<br />

TIM2<br />

ITR1<br />

SOF<br />

pulse<br />

SOFgen<br />

PA9<br />

PA11<br />

PA12<br />

PA10<br />

VBUS<br />

D -<br />

D +<br />

ID<br />

V SS<br />

USB micro-AB connector<br />

ai17120<br />

708/995 Doc ID 13902 Rev 9

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