STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

USB on-the-go full-speed (OTG_FS)
RM0008
OTG_FS all endpoints interrupt mask register (OTG_FS_DAINTMSK)
Address offset: 0x81C
Reset value: 0x0000 0000
The Device endpoint interrupt mask register works with the Device endpoint interrupt
register to interrupt the application when an event occurs on a device endpoint. However,
the Device all endpoints interrupt (OTG_FS_DAINT) register bit corresponding to that
interrupt is still set.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OEPM
IEPM
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Bits 31:16 OEPM: OUT EP interrupt mask bits
One per OUT endpoint:
Bit 16 for OUT EP 0, bit 18 for OUT EP 3
0: Masked interrupt
1: Unmasked interrupt
Bits 15:0 IEPM: IN EP interrupt mask bits
One bit per IN endpoint:
Bit 0 for IN EP 0, bit 3 for IN EP 3
0: Masked interrupt
1: Unmasked interrupt
OTG_FS device V BUS discharge time register (OTG_FS_DVBUSDIS)
Address offset: 0x0828
Reset value: 0x0000 17D7
This register specifies the V BUS discharge time after V BUS pulsing during SRP.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
VBUSDT
Reserved
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Bits 31:16 Reserved
Bits 15:0 VBUSDT: Device V BUS discharge time
Specifies the V BUS discharge time after V BUS pulsing during SRP. This value equals:
V BUS discharge time in PHY clocks / 1 024
Depending on your V BUS load, this value may need adjusting.
760/995 Doc ID 13902 Rev 9