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STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

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RM0008<br />

Secure digital input/output interface (SDIO)<br />

20.3 SDIO functional description<br />

The SDIO consists of two parts:<br />

●<br />

●<br />

The SDIO adapter block provides all functions specific to the MMC/SD/SD I/O card<br />

such as the clock generation unit, comm<strong>and</strong> <strong>and</strong> data transfer.<br />

The AHB interface accesses the SDIO adapter registers, <strong>and</strong> generates interrupt <strong>and</strong><br />

DMA request signals.<br />

Figure 182. SDIO block diagram<br />

Interrupts <strong>and</strong><br />

DMA request<br />

SDIO<br />

SDIO_CK<br />

SDIO_CMD<br />

AHB bus<br />

AHB<br />

interface<br />

SDIO<br />

adapter<br />

SDIO_D[7:0]<br />

HCLK/2<br />

SDIOCLK<br />

ai14740<br />

By default SDIO_D0 is used for data transfer. After initialization, the host can change the<br />

databus width.<br />

If a MultiMediaCard is connected to the bus, SDIO_D0, SDIO_D[3:0] or SDIO_D[7:0] can be<br />

used for data transfer. MMC V3.31 or previous, supports only 1 bit of data so only SDIO_D0<br />

can be used.<br />

If an SD or SD I/O card is connected to the bus, data transfer can be configured by the host<br />

to use SDIO_D0 or SDIO_D[3:0]. All data lines are operating in push-pull mode.<br />

SDIO_CMD has two operational modes:<br />

●<br />

Open-drain for initialization (only for MMCV3.31 or previous)<br />

● Push-pull for comm<strong>and</strong> transfer (SD/SD I/O card MMC4.2 use push-pull drivers also for<br />

initialization)<br />

SDIO_CK is the clock to the card: one bit is transferred on both comm<strong>and</strong> <strong>and</strong> data lines<br />

with each clock cycle. The clock frequency can vary between 0 MHz <strong>and</strong> 20 MHz (for a<br />

MultiMediaCard V3.31), between 0 <strong>and</strong> 48 MHz for a MultiMediaCard V4.0/4.2, or between<br />

0 <strong>and</strong> 25 MHz (for an SD/SD I/O card).<br />

The SDIO uses two clock signals:<br />

● SDIO adapter clock (SDIOCLK = HCLK)<br />

● AHB bus clock (HCLK/2)<br />

The signals shown in Table 120 are used on the MultiMediaCard/SD/SD I/O card bus.<br />

Doc ID 13902 Rev 9 459/995

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