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STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

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RM0008<br />

USB on-the-go full-speed (OTG_FS)<br />

Examples<br />

This section describes <strong>and</strong> depicts some fundamental transfer types <strong>and</strong> scenarios.<br />

● Slave mode bulk OUT transaction<br />

Figure 278 depicts the reception of a single Bulk OUT Data packet from the USB to the AHB<br />

<strong>and</strong> describes the events involved in the process.<br />

Figure 278. Slave mode bulk OUT transaction<br />

Host<br />

USB<br />

Device<br />

Application<br />

2<br />

1<br />

init_out_ep<br />

wr_reg(DOEPTSIZx)<br />

XFRSIZ = 512 bytes<br />

PKTCNT = 1<br />

OUT<br />

512 bytes<br />

3<br />

wr_reg(DOEPCTLx)<br />

EPENA= 1<br />

CNAK = 1<br />

4<br />

6<br />

ACK<br />

5<br />

xact_1<br />

DOEPCTLx.NAK=1<br />

PKTCNT 0<br />

RXFLVL iintr<br />

idle until intr<br />

OUT<br />

NAK<br />

7<br />

XFRSIZ = 0<br />

r<br />

XFRC<br />

intr<br />

8<br />

rcv_out _pkt()<br />

idle until intr<br />

On new xfer<br />

or RxFIFO<br />

not empty<br />

ai15679<br />

After a SetConfiguration/SetInterface comm<strong>and</strong>, the application initializes all OUT endpoints<br />

by setting CNAK = 1 <strong>and</strong> EPENA = 1 (in OTG_FS_DOEPCTLx), <strong>and</strong> setting a suitable<br />

XFRSIZ <strong>and</strong> PKTCNT in the OTG_FS_DOEPTSIZx register.<br />

1. Host attempts to send data (OUT token) to an endpoint.<br />

2. When the core receives the OUT token on the USB, it stores the packet in the RxFIFO<br />

because space is available there.<br />

3. After writing the complete packet in the RxFIFO, the core then asserts the RXFLVL<br />

interrupt (in OTG_FS_GINTSTS).<br />

4. On receiving the PKTCNT number of USB packets, the core internally sets the NAK bit<br />

for this endpoint to prevent it from receiving any more packets.<br />

5. The application processes the interrupt <strong>and</strong> reads the data from the RxFIFO.<br />

6. When the application has read all the data (equivalent to XFRSIZ), the core generates<br />

an XFRC interrupt (in OTG_FS_DOEPINTx).<br />

7. The application processes the interrupt <strong>and</strong> uses the setting of the XFRC interrupt bit<br />

(in OTG_FS_DOEPINTx) to determine that the intended transfer is complete.<br />

Doc ID 13902 Rev 9 821/995

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