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STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

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Universal synchronous asynchronous receiver transmitter (USART)<br />

RM0008<br />

Note:<br />

1. Enable the USART by writing the UE bit in USART_CR1 register to 1.<br />

2. Program the M bit in USART_CR1 to define the word length.<br />

3. Program the number of stop bits in USART_CR2.<br />

4. Select DMA enable (DMAR) in USART_CR3 if multibuffer communication is to take<br />

place. Configure the DMA register as explained in multibuffer communication. STEP 3<br />

5. Select the desired baud rate using the baud rate register USART_BRR<br />

6. Set the RE bit USART_CR1. This enables the receiver which begins searching for a<br />

start bit.<br />

When a character is received<br />

● The RXNE bit is set. It indicates that the content of the shift register is transferred to the<br />

RDR. In other words, data has been received <strong>and</strong> can be read (as well as its<br />

associated error flags).<br />

● An interrupt is generated if the RXNEIE bit is set.<br />

● The error flags can be set if a frame error, noise or an overrun error has been detected<br />

during reception.<br />

● In multibuffer, RXNE is set after every byte received <strong>and</strong> is cleared by the DMA read to<br />

the Data Register.<br />

● In single buffer mode, clearing the RXNE bit is performed by a software read to the<br />

USART_DR register. The RXNE flag can also be cleared by writing a zero to it. The<br />

RXNE bit must be cleared before the end of the reception of the next character to avoid<br />

an overrun error.<br />

The RE bit should not be reset while receiving data. If the RE bit is disabled during<br />

reception, the reception of the current byte will be aborted.<br />

Break character<br />

When a break character is received, the USART h<strong>and</strong>les it as a framing error.<br />

Idle character<br />

When an idle frame is detected, there is the same procedure as a data received character<br />

plus an interrupt if the IDLEIE bit is set.<br />

Overrun error<br />

An overrun error occurs when a character is received when RXNE has not been reset. Data<br />

can not be transferred from the shift register to the RDR register until the RXNE bit is<br />

cleared.<br />

662/995 Doc ID 13902 Rev 9

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