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STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

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RM0008<br />

Flexible static memory controller (FSMC)<br />

This situation occurs when a byte access is requested to a 16-bit wide Flash<br />

memory. Clearly, the device cannot be accessed in byte mode (only 16-bit words<br />

can be read from/written to the Flash memory) therefore:<br />

a) Write transactions are not allowed<br />

b) Read transactions are allowed (the controller reads the entire 16-bit memory word<br />

<strong>and</strong> uses the needed byte only).<br />

Configuration registers<br />

The FSMC can be configured using a register set. See Section 19.5.6, for a detailed<br />

description of the NOR Flash/PSRAM controller registers. See Section 19.6.7, for a detailed<br />

description of the NAND Flash/PC Card registers.<br />

19.4 External device address mapping<br />

From the FSMC point of view, the external memory is divided into 4 fixed-size banks of 256<br />

Mbytes each (Refer to Figure 161):<br />

●<br />

●<br />

Bank 1 used to address up to 4 NOR Flash or PSRAM memory devices. This bank is<br />

split into 4 NOR/PSRAM regions with 4 dedicated Chip Select.<br />

Banks 2 <strong>and</strong> 3 used to address NAND Flash devices (1 device per bank)<br />

● Bank 4 used to address a PC Card device<br />

For each bank the type of memory to be used is user-defined in the Configuration register.<br />

Figure 161. FSMC memory banks<br />

Address<br />

Banks<br />

Supported memory type<br />

6000 0000h<br />

6FFF FFFFh<br />

Bank 1<br />

4 × 64 MB<br />

NOR / PSRAM<br />

7000 0000h<br />

7FFF FFFFh<br />

8000 0000h<br />

8FFF FFFFh<br />

Bank 2<br />

4 × 64 MB<br />

Bank 3<br />

4 × 64 MB<br />

NAND Flash<br />

9000 0000h<br />

9FFF FFFFh<br />

Bank 4<br />

4 × 64 MB<br />

PC Card<br />

ai14719<br />

Doc ID 13902 Rev 9 411/995

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