STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

RM0008
Universal synchronous asynchronous receiver transmitter (USART)
Idle characters
25.3.3 Receiver
Setting the TE bit drives the USART to send an idle frame before the first data frame.
The USART can receive data words of either 8 or 9 bits depending on the M bit in the
USART_CR1 register.
Start bit detection
In the USART, the start bit is detected when a specific sequence of samples is recognized.
This sequence is: 1 1 1 0 X 0 X 0X 0X 0 X 0X 0.
Figure 242. Start bit detection
RX state
Idle
Start bit
RX line
Ideal
sample
clock
Real
sample
clock
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
sampled values
X X X X X X X X 9 10 11 12 13 14 15 16
6/16
7/16
7/16
Conditions
to validate
the start bit
1
1
Falling edge
detection
1 0 X 0 X 0 X 0 0 0 0 X X X X X X
At least 2 bits
out of 3 at 0
One-bit time
At least 2 bits
out of 3 at 0
ai15471
Note:
If the sequence is not complete, the start bit detection aborts and the receiver returns to idle
state (no flag is set) waiting for a falling edge.
If only 2 out of the 3 bits are at 0 (sampling on the 3 rd , 5 th and 7 th bits or sampling on the 8 th ,
9 th and 10 th bits), the start bit is validated but the NE noise flag bit is set.
The start bit is confirmed if the last 3 samples are at 0 (sampling on the 8 th , 9 th , and 10 th
bits.
Character reception
During an USART reception, data shifts in least significant bit first through the RX pin. In this
mode, the USART_DR register consists of a buffer (RDR) between the internal bus and the
received shift register.
Procedure:
Doc ID 13902 Rev 9 661/995