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STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

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RM0008<br />

Basic timers (TIM6&TIM7)<br />

Figure 149. Counter timing diagram, internal clock divided by 2<br />

CK_INT<br />

CNT_EN<br />

Timer clock = CK_CNT<br />

Counter register<br />

0034 0035 0036 0000 0001 0002 0003<br />

Counter overflow<br />

Update event (UEV)<br />

Update interrupt flag (UIF)<br />

Figure 150. Counter timing diagram, internal clock divided by 4<br />

CK_INT<br />

CNT_EN<br />

TImer clock = CK_CNT<br />

Counter register<br />

0035 0036<br />

0000 0001<br />

Counter overflow<br />

Update event (UEV)<br />

Update interrupt flag (UIF)<br />

Figure 151. Counter timing diagram, internal clock divided by N<br />

CK_INT<br />

Timer clock = CK_CNT<br />

Counter register 1F 20<br />

00<br />

Counter overflow<br />

Update event (UEV)<br />

Update interrupt flag (UIF)<br />

Doc ID 13902 Rev 9 379/995

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