STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

Universal synchronous asynchronous receiver transmitter (USART)
RM0008
IrDA low-power mode
Transmitter:
In low-power mode the pulse width is not maintained at 3/16 of the bit period. Instead, the
width of the pulse is 3 times the low-power baud rate which can be a minimum of 1.42 MHz.
Generally this value is 1.8432 MHz (1.42 MHz < PSC< 2.12 MHz). A low-power mode
programmable divisor divides the system clock to achieve this value.
Receiver:
Receiving in low-power mode is similar to receiving in normal mode. For glitch detection the
USART should discard pulses of duration shorter than 1/PSC. A valid low is accepted only if
its duration is greater than 2 periods of the IrDA low-power Baud clock (PSC value in
USART_GTPR).
Note: 1 A pulse of width less than two and greater than one PSC period(s) may or may not be
rejected.
2 The receiver set up time should be managed by software. The IrDA physical layer
specification specifies a minimum of 10 ms delay between transmission and reception (IrDA
is a half duplex protocol).
Figure 254. IrDA SIR ENDEC- block diagram
TX
OR
USART_TX
USART
SIREN
SIR
Transmit
Encoder
IrDA_OUT
RX
SIR
Receive
Decoder
IrDA_IN
USART_RX
Figure 255. IrDA data modulation (3/16) -normal mode
TX
IrDA_OUT
Start
stop bit
bit
0 1 0 1 0 0 1 1 0 1
bit period
3/16
IrDA_IN
RX
0 1 0 1
0 0 1 1 0 1
678/995 Doc ID 13902 Rev 9