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STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

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USB on-the-go full-speed (OTG_FS)<br />

RM0008<br />

Bit 30 EPDIS: Endpoint disable<br />

The application sets this bit to stop transmitting/receiving data on an endpoint, even before<br />

the transfer for that endpoint is complete. The application must wait for the Endpoint disabled<br />

interrupt before treating the endpoint as disabled. The core clears this bit before setting the<br />

Endpoint disabled interrupt. The application must set this bit only if Endpoint enable is already<br />

set for this endpoint.<br />

Bit 29 SODDFRM: Set odd frame<br />

Applies to isochronous OUT endpoints only.<br />

Writing to this field sets the Even/Odd frame (EONUM) field to odd frame.<br />

Bit 28 SD0PID: Set DATA0 PID<br />

Applies to interrupt/bulk OUT endpoints only.<br />

Writing to this field sets the endpoint data PID (DPID) field in this register to DATA0.<br />

SEVNFRM: Set even frame<br />

Applies to isochronous OUT endpoints only.<br />

Writing to this field sets the Even/Odd frame (EONUM) field to even frame.<br />

Bit 27 SNAK: Set NAK<br />

A write to this bit sets the NAK bit for the endpoint.<br />

Using this bit, the application can control the transmission of NAK h<strong>and</strong>shakes on an<br />

endpoint. The core can also set this bit for OUT endpoints on a Transfer Completed interrupt,<br />

or after a SETUP is received on the endpoint.<br />

Bit 26 CNAK: Clear NAK<br />

A write to this bit clears the NAK bit for the endpoint.<br />

Bits 25:22 Reserved<br />

Bit 21 STALL: STALL h<strong>and</strong>shake<br />

Applies to non-control, non-isochronous OUT endpoints only (access type is rw).<br />

The application sets this bit to stall all tokens from the USB host to this endpoint. If a NAK<br />

bit, Global IN NAK, or Global OUT NAK is set along with this bit, the STALL bit takes<br />

priority. Only the application can clear this bit, never the core.<br />

Applies to control endpoints only (access type is rs).<br />

The application can only set this bit, <strong>and</strong> the core clears it, when a SETUP token is received<br />

for this endpoint. If a NAK bit, Global IN NAK, or Global OUT NAK is set along with this bit,<br />

the STALL bit takes priority. Irrespective of this bit’s setting, the core always responds to<br />

SETUP data packets with an ACK h<strong>and</strong>shake.<br />

Bit 20 SNPM: Snoop mode<br />

This bit configures the endpoint to Snoop mode. In Snoop mode, the core does not check the<br />

correctness of OUT packets before transferring them to application memory.<br />

Bits 19:18 EPTYP: Endpoint type<br />

This is the transfer type supported by this logical endpoint.<br />

00: Control<br />

01: Isochronous<br />

10: Bulk<br />

11: Interrupt<br />

768/995 Doc ID 13902 Rev 9

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