STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

USB on-the-go full-speed (OTG_FS)
RM0008
OTG_FS device IN endpoint 0 transfer size register (OTG_FS_DIEPTSIZ0)
Address offset: 0x910
Reset value: 0x0000 0000
The application must modify this register before enabling endpoint 0. Once endpoint 0 is
enabled using the endpoint enable bit in the device control endpoint 0 control registers
(EPENA in OTG_FS_DIEPCTL0), the core modifies this register. The application can only
read this register once the core has cleared the Endpoint enable bit.
Nonzero endpoints use the registers for endpoints 1–15.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PKTCNT
XFRSIZ
Reserved
Reserved
rw rw rw rw rw rw rw rw rw
Bits 31:21 Reserved
Bits 20:19 PKTCNT: Packet count
Indicates the total number of USB packets that constitute the Transfer Size amount of data for
endpoint 0.
This field is decremented every time a packet (maximum size or short packet) is read from the
TxFIFO.
Bits 18:7 Reserved
Bits 6:0 XFRSIZ: Transfer size
Indicates the transfer size in bytes for endpoint 0. The core interrupts the application only after
it has exhausted the transfer size amount of data. The transfer size can be set to the maximum
packet size of the endpoint, to be interrupted at the end of each packet.
The core decrements this field every time a packet from the external memory is written to the
TxFIFO.
772/995 Doc ID 13902 Rev 9