STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

Ethernet (ETH): media access control (MAC) with DMA controller
RM0008
Reception of frames with the PTP feature
When the IEEE 1588 time stamping feature is enabled, the Ethernet MAC captures the time
stamp of all frames received on the MII. The received frames are not processed to identify
PTP frames. The MAC provides the time stamp as soon as the frame reception is complete.
Captured time stamps are returned to the application in the same way as the frame status is
provided. The time stamp is sent back along with the Receive status of the frame, inside the
corresponding receive descriptor. The 64-bit time stamp information is written back to the
RDES2 and RDES3 fields, with RDES2 holding the time stamp’s 32 least significant bits as
described in Rx DMA descriptors format with IEEE1588 time stamp on page 903.
System Time correction methods
The 64-bit PTP time is updated using the PTP input reference clock, HCLK. This PTP time is
used as a source to take snapshots (time stamps) of the Ethernet frames being transmitted
or received at the MII. The System Time counter can be initialized or corrected using either
the Coarse or the Fine correction method.
In the Coarse correction method, the initial value or the offset value is written to the Time
stamp update register (refer to Section 27.8.3: IEEE 1588 time stamp registers on
page 927). For initialization, the System Time counter is written with the value in the Time
stamp update registers, whereas for system time correction, the offset value (Time stamp
update register) is added to or subtracted from the system time.
In the Fine correction method, the slave clock (reference clock) frequency drift with respect
to the master clock (as defined in IEEE 1588) is corrected over a period of time, unlike in the
Coarse correction method where it is corrected in a single clock cycle. The longer correction
time helps maintain linear time and does not introduce drastic changes (or a large jitter) in
the reference time between PTP Sync message intervals. In this method, an accumulator
sums up the contents of the Addend register as shown in Figure 307. The arithmetic carry
that the accumulator generates is used as a pulse to increment the system time counter.
The accumulator and the addend are 32-bit registers. Here, the accumulator acts as a highprecision
frequency multiplier or divider. Figure 307 shows this algorithm.
874/995 Doc ID 13902 Rev 9