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STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

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RM0008<br />

USB on-the-go full-speed (OTG_FS)<br />

Device mode:<br />

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

FRMNUM PKTSTS DPID BCNT EPNUM<br />

Reserved<br />

r r r r r<br />

Bits 31:25 Reserved<br />

Bits 24:21 FRMNUM: Frame number<br />

This is the least significant 4 bits of the frame number in which the packet is received on the<br />

USB. This field is supported only when isochronous OUT endpoints are supported.<br />

Bits 20:17 PKTSTS: Packet status<br />

Indicates the status of the received packet<br />

0001: Global OUT NAK (triggers an interrupt)<br />

0010: OUT data packet received<br />

0011: OUT transfer completed (triggers an interrupt)<br />

0100: SETUP transaction completed (triggers an interrupt)<br />

0110: SETUP data packet received<br />

Others: Reserved<br />

Bits 16:15 DPID: Data PID<br />

Indicates the Data PID of the received OUT data packet<br />

00: DATA0<br />

10: DATA1<br />

01: DATA2<br />

11: MDATA<br />

Bits 14:4 BCNT: Byte count<br />

Indicates the byte count of the received data packet.<br />

Bits 3:0 EPNUM: Endpoint number<br />

Indicates the endpoint number to which the current received packet belongs.<br />

OTG_FS Receive FIFO size register (OTG_FS_GRXFSIZ)<br />

Address offset: 0x024<br />

Reset value: 0x0000 0200<br />

The application can program the RAM size that must be allocated to the RxFIFO.<br />

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

RXFD<br />

Reserved<br />

r/rw<br />

Bits 31:16 Reserved<br />

Bits 15:0 RXFD: RxFIFO depth<br />

This value is in terms of 32-bit words.<br />

Minimum value is 16<br />

Maximum value is 256<br />

The power-on reset value of this register is specified as the largest Rx data FIFO depth.<br />

Doc ID 13902 Rev 9 739/995

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