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STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

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RM0008<br />

USB on-the-go full-speed (OTG_FS)<br />

1. To stop transmitting any data on a particular IN endpoint, the application must set the<br />

IN NAK bit. To set this bit, the following field must be programmed.<br />

– SNAK = 1 in OTG_FS_DIEPCTLx<br />

2. Wait for assertion of the INEPNE interrupt in OTG_FS_DIEPINTx. This interrupt<br />

indicates that the core has stopped transmitting data on the endpoint.<br />

3. The core can transmit valid IN data on the endpoint after the application has set the<br />

NAK bit, but before the assertion of the NAK Effective interrupt.<br />

4. The application can mask this interrupt temporarily by writing to the INEPNEM bit in<br />

DIEPMSK.<br />

– INEPNEM = 0 in DIEPMSK<br />

5. To exit Endpoint NAK mode, the application must clear the NAK status bit (NAKSTS) in<br />

OTG_FS_DIEPCTLx. This also clears the INEPNE interrupt (in OTG_FS_DIEPINTx).<br />

– CNAK = 1 in OTG_FS_DIEPCTLx<br />

6. If the application masked this interrupt earlier, it must be unmasked as follows:<br />

– INEPNEM = 1 in DIEPMSK<br />

● IN endpoint disable<br />

Use the following sequence to disable a specific IN endpoint that has been previously<br />

enabled.<br />

Application programming sequence:<br />

1. The application must stop writing data on the AHB for the IN endpoint to be disabled.<br />

2. The application must set the endpoint in NAK mode.<br />

– SNAK = 1 in OTG_FS_DIEPCTLx<br />

3. Wait for the INEPNE interrupt in OTG_FS_DIEPINTx.<br />

4. Set the following bits in the OTG_FS_DIEPCTLx register for the endpoint that must be<br />

disabled.<br />

– EPDIS = 1 in OTG_FS_DIEPCTLx<br />

– SNAK = 1 in OTG_FS_DIEPCTLx<br />

5. Assertion of the EPDISD interrupt in OTG_FS_DIEPINTx indicates that the core has<br />

completely disabled the specified endpoint. Along with the assertion of the interrupt,<br />

the core also clears the following bits:<br />

– EPENA = 0 in OTG_FS_DIEPCTLx<br />

– EPDIS = 0 in OTG_FS_DIEPCTLx<br />

6. The application must read the OTG_FS_DIEPTSIZx register for the periodic IN EP, to<br />

calculate how much data on the endpoint were transmitted on the USB.<br />

7. The application must flush the data in the Endpoint transmit FIFO, by setting the<br />

following fields in the OTG_FS_GRSTCTL register:<br />

– TXFNUM (in OTG_FS_GRSTCTL) = Endpoint transmit FIFO number<br />

– TXFFLSH in (OTG_FS_GRSTCTL) = 1<br />

The application must poll the OTG_FS_GRSTCTL register, until the TXFFLSH bit is cleared<br />

by the core, which indicates the end of flush operation. To transmit new data on this<br />

endpoint, the application can re-enable the endpoint at a later point.<br />

Doc ID 13902 Rev 9 823/995

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