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STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

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RM0008<br />

Flexible static memory controller (FSMC)<br />

Table 109. FSMC_BCRx bit fields (continued)<br />

Bit No. Bit name Value to set<br />

11 WAITCFG to be set according to memory<br />

10 WRAPMOD to be set according to memory<br />

9 WAITPOL to be set according to memory<br />

8 BURSTEN 0x1<br />

7 FWPRLVL Set to protect memory from accidental write access<br />

6 FACCEN Set according to memory support<br />

5-4 MWID As needed<br />

3-2 MTYP 0x1 or 0x2<br />

1 MUXEN As needed<br />

0 MBKEN 0x1<br />

Table 110. FSMC_TCRx bit fields<br />

Bit No. Bit name Value to set<br />

27-24 DATLAT Data latency<br />

23-20 CLKDIV<br />

0x0 to get CLK = HCLK (not supported)<br />

0x1 to get CLK = 2 × HCLK<br />

19-16 BUSTURN no effect<br />

15-8 DATAST no effect<br />

7-4 ADDHLD no effect<br />

3-0 ADDSET no effect<br />

Doc ID 13902 Rev 9 433/995

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