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STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

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USB on-the-go full-speed (OTG_FS)<br />

RM0008<br />

2. The application can only schedule data transfers one frame at a time.<br />

– (MCNT – 1) × MPSIZ XFERSIZ MCNT × MPSIZ<br />

– PKTCNT = MCNT (in OTG_FS_DIEPTSIZx)<br />

– If XFERSIZ < MCNT × MPSIZ, the last data packet of the transfer is a short<br />

packet.<br />

– Note that: MCNT is in OTG_FS_DIEPTSIZx, MPSIZ is in OTG_FS_DIEPCTLx,<br />

PKTCNT is in OTG_FS_DIEPTSIZx <strong>and</strong> XFERSIZ is in OTG_FS_DIEPTSIZx<br />

3. The complete data to be transmitted in the frame must be written into the transmit FIFO<br />

by the application, before the IN token is received. Even when 1 DWORD of the data to<br />

be transmitted per frame is missing in the transmit FIFO when the IN token is received,<br />

the core behaves as when the FIFO is empty. When the transmit FIFO is empty:<br />

– A zero data length packet would be transmitted on the USB for isochronous IN<br />

endpoints<br />

– A NAK h<strong>and</strong>shake would be transmitted on the USB for interrupt IN endpoints<br />

4. For a high-b<strong>and</strong>width IN endpoint with three packets in a frame, the application can<br />

program the endpoint FIFO size to be 2 × max_pkt_size <strong>and</strong> have the third packet<br />

loaded in after the first packet has been transmitted on the USB.<br />

Internal data flow:<br />

1. The application must set the transfer size <strong>and</strong> packet count fields in the endpointspecific<br />

registers <strong>and</strong> enable the endpoint to transmit the data.<br />

2. The application must also write the required data to the associated transmit FIFO for<br />

the endpoint.<br />

3. Every time the application writes a packet to the transmit FIFO, the transfer size for that<br />

endpoint is decremented by the packet size. The data are fetched from application<br />

memory until the transfer size for the endpoint becomes 0.<br />

4. When an IN token is received for a periodic endpoint, the core transmits the data in the<br />

FIFO, if available. If the complete data payload (complete packet, in dedicated FIFO<br />

mode) for the frame is not present in the FIFO, then the core generates an IN token<br />

received when TxFIFO empty interrupt for the endpoint.<br />

– A zero-length data packet is transmitted on the USB for isochronous IN endpoints<br />

– A NAK h<strong>and</strong>shake is transmitted on the USB for interrupt IN endpoints<br />

5. The packet count for the endpoint is decremented by 1 under the following conditions:<br />

– For isochronous endpoints, when a zero- or non-zero-length data packet is<br />

transmitted<br />

– For interrupt endpoints, when an ACK h<strong>and</strong>shake is transmitted<br />

– When the transfer size <strong>and</strong> packet count are both 0, the transfer completed<br />

interrupt for the endpoint is generated <strong>and</strong> the endpoint enable is cleared.<br />

6. At the “Periodic frame Interval” (controlled by PFIVL in OTG_FS_DCFG), when the<br />

core finds non-empty any of the isochronous IN endpoint FIFOs scheduled for the<br />

current frame non-empty, the core generates an IISOIXFR interrupt in<br />

OTG_FS_GINTSTS.<br />

826/995 Doc ID 13902 Rev 9

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