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STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

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USB on-the-go full-speed (OTG_FS)<br />

RM0008<br />

Figure 281. B-device SRP<br />

VBUS_VALID<br />

Suspend<br />

1<br />

6<br />

B_VALID<br />

2<br />

3<br />

DISCHRG_VBUS<br />

SESS_END<br />

4<br />

DP<br />

5 8<br />

Data line pulsing<br />

Connect<br />

DM<br />

Low<br />

CHRG_VBUS<br />

7<br />

V BUS pulsing<br />

ai15682<br />

1. VBUS_VALID = V BUS valid signal from PHY<br />

B_VALID = B-peripheral valid session to PHY<br />

DISCHRG_VBUS = discharge signal to PHY<br />

SESS_END = session end signal to PHY<br />

CHRG_VBUS = charge V BUS signal to PHY<br />

DP = Data plus line<br />

DM = Data minus line<br />

1. To save power, the host suspends <strong>and</strong> turns off port power when the bus is idle.<br />

The OTG_FS controller sets the early suspend bit in the Core interrupt register after 3<br />

ms of bus idleness. Following this, the OTG_FS controller sets the USB suspend bit in<br />

the Core interrupt register.<br />

The OTG_FS controller informs the PHY to discharge V BUS .<br />

2. The PHY indicates the session’s end to the device. This is the initial condition for SRP.<br />

The OTG_FS controller requires 2 ms of SE0 before initiating SRP.<br />

For a USB 1.1 full-speed serial transceiver, the application must wait until V BUS<br />

discharges to 0.2 V after BSVLD (in OTG_FS_GOTGCTL) is deasserted. This<br />

discharge time can be obtained from the transceiver vendor <strong>and</strong> varies from one<br />

transceiver to another.<br />

3. The application initiates SRP by writing the session request bit in the OTG Control <strong>and</strong><br />

status register. The OTG_FS controller perform data-line pulsing followed by V BUS<br />

pulsing.<br />

4. The host detects SRP from either the data-line or V BUS pulsing, <strong>and</strong> turns on V BUS .<br />

The PHY indicates V BUS power-on to the device.<br />

5. The OTG_FS controller performs V BUS pulsing.<br />

The host starts a new session by turning on V BUS , indicating SRP success. The<br />

OTG_FS controller interrupts the application by setting the session request success<br />

status change bit in the OTG interrupt status register. The application reads the session<br />

request success bit in the OTG control <strong>and</strong> status register.<br />

6. When the USB is powered, the OTG_FS controller connects, completing the SRP<br />

process.<br />

832/995 Doc ID 13902 Rev 9

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