STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

Secure digital input/output interface (SDIO)
RM0008
Table 120.
SDIO I/O definitions
Pin Direction Description
SDIO_CK
SDIO_CMD
SDIO_D[7:0]
Output
Bidirectional
Bidirectional
MultiMediaCard/SD/SDIO card clock. This pin is the clock from
host to card.
MultiMediaCard/SD/SDIO card command. This pin is the
bidirectional command/response signal.
MultiMediaCard/SD/SDIO card data. These pins are the
bidirectional databus.
20.3.1 SDIO adapter
Figure 183 shows a simplified block diagram of an SDIO adapter.
Figure 183. SDIO adapter
SDIO adapter
Control unit
SDIO_CK
Adapter
registers
Command
path
SDIO_CMD
Card bus
To AHB
interface
FIFO
Data path
SDIO_D[7:0]
HCLK/2
SDIOCLK
ai14740
Note:
The SDIO adapter is a multimedia/secure digital memory card bus master that provides an
interface to a multimedia card stack or to a secure digital memory card. It consists of five
subunits:
● Adapter register block
● Control unit
● Command path
● Data path
● Data FIFO
The adapter registers and FIFO use the AHB bus clock domain (HCLK/2). The control unit,
command path and data path use the SDIO adapter clock domain (SDIOCLK).
Adapter register block
The adapter register block contains all system registers. This block also generates the
signals that clear the static flags in the multimedia card. The clear signals are generated
when 1 is written into the corresponding bit location in the SDIO Clear register.
460/995 Doc ID 13902 Rev 9