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STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

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USB on-the-go full-speed (OTG_FS)<br />

RM0008<br />

IN data transfers<br />

● Packet write<br />

This section describes how the application writes data packets to the endpoint FIFO in Slave<br />

mode when dedicated transmit FIFOs are enabled.<br />

1. The application can either choose the polling or the interrupt mode.<br />

– In polling mode, the application monitors the status of the endpoint transmit data<br />

FIFO by reading the OTG_FS_DTXFSTSx register, to determine if there is enough<br />

space in the data FIFO.<br />

– In interrupt mode, the application waits for the TXFE interrupt (in<br />

OTG_FS_DIEPINTx) <strong>and</strong> then reads the OTG_FS_DTXFSTSx register, to<br />

determine if there is enough space in the data FIFO.<br />

– To write a single non-zero length data packet, there must be space to write the<br />

entire packet in the data FIFO.<br />

– To write zero length packet, the application must not look at the FIFO space.<br />

2. Using one of the above mentioned methods, when the application determines that<br />

there is enough space to write a transmit packet, the application must first write into the<br />

endpoint control register, before writing the data into the data FIFO. Typically, the<br />

application, must do a read modify write on the OTG_FS_DIEPCTLx register to avoid<br />

modifying the contents of the register, except for setting the Endpoint Enable bit.<br />

The application can write multiple packets for the same endpoint into the transmit FIFO, if<br />

space is available. For periodic IN endpoints, the application must write packets only for one<br />

microframe. It can write packets for the next periodic transaction only after getting transfer<br />

complete for the previous transaction.<br />

● Setting IN endpoint NAK<br />

Internal data flow:<br />

1. When the application sets the IN NAK for a particular endpoint, the core stops<br />

transmitting data on the endpoint, irrespective of data availability in the endpoint’s<br />

transmit FIFO.<br />

2. Non-isochronous IN tokens receive a NAK h<strong>and</strong>shake reply<br />

– Isochronous IN tokens receive a zero-data-length packet reply<br />

3. The core asserts the INEPNE (IN endpoint NAK effective) interrupt in<br />

OTG_FS_DIEPINTx in response to the SNAK bit in OTG_FS_DIEPCTLx.<br />

4. Once this interrupt is seen by the application, the application can assume that the<br />

endpoint is in IN NAK mode. This interrupt can be cleared by the application by setting<br />

the CNAK bit in OTG_FS_DIEPCTLx.<br />

Application programming sequence:<br />

822/995 Doc ID 13902 Rev 9

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