STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

RM0008
Universal synchronous asynchronous receiver transmitter (USART)
25.3.1 USART character description
Word length may be selected as being either 8 or 9 bits by programming the M bit in the
USART_CR1 register (see Figure 239).
The TX pin is in low state during the start bit. It is in high state during the stop bit.
An Idle character is interpreted as an entire frame of “1”s followed by the start bit of the next
frame which contains data (The number of “1” ‘s will include the number of stop bits).
A Break character is interpreted on receiving “0”s for a frame period. At the end of the
break frame the transmitter inserts either 1 or 2 stop bits (logic “1” bit) to acknowledge the
start bit.
Transmission and reception are driven by a common baud rate generator, the clock for each
is generated when the enable bit is set respectively for the transmitter and receiver.
The details of each block is given below.
Figure 239. Word length programming
Clock
9-bit word length (M bit is set), 1 stop bit
Possible
Data frame
parity
bit
Start
bit Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Bit8
Idle frame
**
Stop
bit
Next
Start
bit
Start
bit
Next data frame
Clock
8-bit word length (M bit is reset), 1 stop bit
Start
Bit
Break frame
Data frame
Possible
Parity
Bit
Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7
Stop
Bit
Next
Start
Bit
Stop
bit
Start
bit
** LBCL bit controls last data clock pulse
****
**
Next data frame
Idle frame
Break frame
Start
bit
Stop
bit
Start
bit
** LBCL bit controls last data clock pulse
Doc ID 13902 Rev 9 657/995