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STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

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RM0008<br />

General-purpose timer (TIMx)<br />

As in the previous example, you can initialize both counters before starting counting.<br />

Figure 143 shows the behavior with the same configuration as in Figure 142 but in trigger<br />

mode instead of gated mode (SMS=110 in the TIM2_SMCR register).<br />

Figure 143. Triggering timer 2 with Enable of timer 1<br />

CK_INT<br />

TIMER1-CEN=CNT_EN<br />

TIMER1-CNT_INIT<br />

TIMER1-CNT<br />

75 00 01<br />

02<br />

TIMER2-CNT<br />

CD 00 E7 E8 E9 EA<br />

TIMER2-CNT_INIT<br />

TIMER2<br />

write CNT<br />

TIMER 2-TIF<br />

Write TIF=0<br />

Using one timer as prescaler for another timer<br />

For example, you can configure Timer 1 to act as a prescaler for Timer 2. Refer to<br />

Figure 139 for connections. To do this:<br />

●<br />

●<br />

●<br />

●<br />

●<br />

●<br />

Configure Timer 1 master mode to send its Update Event (UEV) as trigger output<br />

(MMS=010 in the TIM1_CR2 register). then it outputs a periodic signal on each counter<br />

overflow.<br />

Configure the Timer 1 period (TIM1_ARR registers).<br />

Configure Timer 2 to get the input trigger from Timer 1 (TS=000 in the TIM2_SMCR<br />

register).<br />

Configure Timer 2 in external clock mode 1 (SMS=111 in TIM2_SMCR register).<br />

Start Timer 2 by writing ‘1’ in the CEN bit (TIM2_CR1 register).<br />

Start Timer 1 by writing ‘1’ in the CEN bit (TIM1_CR1 register).<br />

Starting 2 timers synchronously in response to an external trigger<br />

In this example, we set the enable of timer 1 when its TI1 input rises, <strong>and</strong> the enable of<br />

Timer 2 with the enable of Timer 1. Refer to Figure 139 for connections. To ensure the<br />

Doc ID 13902 Rev 9 353/995

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