STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

RM0008
USB on-the-go full-speed (OTG_FS)
Table 183.
Acronym
Device-mode control and status registers (continued)
Offset
address
Register name
OTG_FS_DIEPCTLx
OTG_FS_DIEPINTx
OTG_FS_DIEPTSIZ0
OTG_FS_DTXFSTSx
OTG_FS_DIEPTSIZx
OTG_FS_DOEPCTL0
OTG_FS_DOEPCTLx
OTG_FS_DOEPINTx
OTG_FS_DOEPTSIZx
0x920
0x940
...
0xAE0
0x908
0x910
0x918
0x930
0x950
...
0xAF0
0xB00
0xB20
0xB40
...
0xCC0
0xCE0
0xCFD
0xB08
0xB10
OTG device endpoint-x control register (OTG_FS_DIEPCTLx) (x = 1..3,
where x = Endpoint_number) on page 764
OTG_FS device endpoint-x interrupt register (OTG_FS_DIEPINTx)
(x = 0..3, where x = Endpoint_number) on page 771
OTG_FS device IN endpoint 0 transfer size register
(OTG_FS_DIEPTSIZ0) on page 773
OTG_FS device IN endpoint transmit FIFO status register
(OTG_FS_DTXFSTSx) (x = 0..3, where x = Endpoint_number) on
page 776
OTG_FS device endpoint-x transfer size register
(OTG_FS_DOEPTSIZx) (x = 1..3, where x = Endpoint_number) on
page 776
OTG_FS device control OUT endpoint 0 control register
(OTG_FS_DOEPCTL0) on page 767
OTG device endpoint-x control register (OTG_FS_DIEPCTLx) (x = 1..3,
where x = Endpoint_number) on page 764
OTG_FS device endpoint-x interrupt register (OTG_FS_DIEPINTx)
(x = 0..3, where x = Endpoint_number) on page 771
OTG_FS device endpoint-x transfer size register
(OTG_FS_DOEPTSIZx) (x = 1..3, where x = Endpoint_number) on
page 776
Data FIFO (DFIFO) access register map
These registers, available in both Host and Device modes, are used to read or write the
FIFO space for a specific endpoint or a channel, in a given direction. If a host channel is of
type IN, the FIFO can only be read on the channel. Similarly, if a host channel is of type
OUT, the FIFO can only be written on the channel.
Doc ID 13902 Rev 9 721/995