29.01.2015 Views

STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

RM0008<br />

USB on-the-go full-speed (OTG_FS)<br />

OTG_FS interrupt mask register (OTG_FS_GINTMSK)<br />

Address offset: 0x018<br />

Reset value: 0x0000 0000<br />

This register works with the Core interrupt register to interrupt the application. When an<br />

interrupt bit is masked, the interrupt associated with that bit is not generated. However, the<br />

Core Interrupt (OTG_FS_GINTSTS) register bit corresponding to that interrupt is still set.<br />

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

WUIM<br />

SRQIM<br />

DISCINT<br />

CIDSCHGM<br />

Reserved<br />

PTXFEM<br />

HCIM<br />

PRTIM<br />

Reserved<br />

FSUSPM<br />

IPXFRM/IISOOXFRM<br />

IISOIXFRM<br />

OEPINT<br />

IEPINT<br />

EPMISM<br />

Reserved<br />

EOPFM<br />

ISOODRPM<br />

ENUMDNEM<br />

USBRST<br />

USBSUSPM<br />

ESUSPM<br />

Reserved<br />

GONAKEFFM<br />

GINAKEFFM<br />

NPTXFEM<br />

RXFLVLM<br />

SOFM<br />

OTGINT<br />

MMISM<br />

Reserved<br />

rw rw rw rw rw rw r rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw<br />

Bit 31 WUIM: Resume/remote wakeup detected interrupt mask<br />

0: Masked interrupt<br />

1: Unmasked interrupt<br />

Note: Accessible in both Host <strong>and</strong> Device modes.<br />

Bit 30 SRQIM: Session request/new session detected interrupt mask<br />

0: Masked interrupt<br />

1: Unmasked interrupt<br />

Note: Accessible in both Host <strong>and</strong> Device modes.<br />

Bit 29 DISCINT: Disconnect detected interrupt mask<br />

0: Masked interrupt<br />

1: Unmasked interrupt<br />

Note: Accessible in both Host <strong>and</strong> Device modes.<br />

Bit 28 CIDSCHGM: Connector ID status change mask<br />

0: Masked interrupt<br />

1: Unmasked interrupt<br />

Note: Accessible in both Host <strong>and</strong> Device modes.<br />

Bit 27 Reserved<br />

Bit 26 PTXFEM: Periodic TxFIFO empty mask<br />

0: Masked interrupt<br />

1: Unmasked interrupt<br />

Note: Only accessible in Host mode.<br />

Bit 25 HCIM: Host channels interrupt mask<br />

0: Masked interrupt<br />

1: Unmasked interrupt<br />

Note: Only accessible in Host mode.<br />

Bit 24 PRTIM: Host port interrupt mask<br />

0: Masked interrupt<br />

1: Unmasked interrupt<br />

Note: Only accessible in Host mode.<br />

Doc ID 13902 Rev 9 735/995

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!