29.01.2015 Views

STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

Ethernet (ETH): media access control (MAC) with DMA controller<br />

RM0008<br />

Figure 299. Frame transmission in MMI <strong>and</strong> RMII modes<br />

MII_RX_CLK<br />

MII_TX_EN<br />

MII_TXD[3:0]<br />

RMII_REF_CLK<br />

RMII_TX_EN<br />

RMII_TXD[1:0]<br />

ai15652<br />

27.5.3 MAC frame reception<br />

The MAC received frames are pushes into the Rx FIFO. The status (fill level) of this FIFO is<br />

indicated to the DMA once it crosses the configured receive threshold (RTC in the<br />

ETH_DMAOMR register) so that the DMA can initiate pre-configured burst transfers towards<br />

the AHB interface.<br />

In the default Cut-through mode, when 64 bytes (configured with the RTC bits in the<br />

ETH_DMAOMR register) or a full packet of data are received into the FIFO, the data are<br />

popped out <strong>and</strong> the DMA is notified of its availability. Once the DMA has initiated the transfer<br />

to the AHB interface, the data transfer continues from the FIFO until a complete packet has<br />

been transferred. Upon completion of the EOF frame transfer, the status word is popped out<br />

<strong>and</strong> sent to the DMA controller.<br />

In Rx FIFO Store-<strong>and</strong>-forward mode (configured by the RSF bit in the ETH_DMAOMR<br />

register), a frame is read out only after being written completely into the Receive FIFO. In<br />

this mode, all error frames are dropped (if the core is configured to do so) such that only<br />

valid frames are read out <strong>and</strong> forwarded to the application. In Cut-through mode, some error<br />

frames are not dropped, because the error status is received at the end of the frame, by<br />

which time the start of that frame has already been read out of the FIFO.<br />

A receive operation is initiated when the MAC detects an SFD on the MII. The core strips the<br />

preamble <strong>and</strong> SFD before proceeding to process the frame. The header fields are checked<br />

for the filtering <strong>and</strong> the FCS field used to verify the CRC for the frame. The frame is dropped<br />

in the core if it fails the address filter.<br />

Receive protocol<br />

The received frame preamble <strong>and</strong> SFD are stripped. Once the SFD has been detected, the<br />

MAC starts sending the Ethernet frame data to the receive FIFO, beginning with the first<br />

byte following the SFD (destination address). If IEEE 1588 time stamping is enabled, a<br />

snapshot of the system time is taken when any frame's SFD is detected on the MII. Unless<br />

the MAC filters out <strong>and</strong> drops the frame, this time stamp is passed on to the application.<br />

860/995 Doc ID 13902 Rev 9

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!