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STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

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RM0008<br />

Universal serial bus full-speed device interface (USB)<br />

Figure 190. USB peripheral block diagram<br />

DP<br />

DM<br />

Analog<br />

transceiver<br />

USB clock (48 MHz)<br />

PCLK1<br />

USB<br />

Suspend<br />

timer<br />

RX-TX<br />

Control<br />

S.I.E.<br />

Clock<br />

recovery<br />

Endpoint<br />

selection<br />

Control<br />

registers & logic<br />

Interrupt<br />

registers & logic<br />

Packet<br />

buffer<br />

interface<br />

Endpoint<br />

registers<br />

Endpoint<br />

registers<br />

Arbiter<br />

Packet<br />

buffer<br />

memory<br />

Register<br />

mapper<br />

Interrupt<br />

mapper<br />

APB1 wrapper<br />

APB1 interface<br />

PCLK1 APB1 bus IRQs to NVIC<br />

The USB peripheral provides an USB compliant connection between the host PC <strong>and</strong> the<br />

function implemented by the microcontroller. Data transfer between the host PC <strong>and</strong> the<br />

system memory occurs through a dedicated packet buffer memory accessed directly by the<br />

USB peripheral. The size of this dedicated buffer memory must be according to the number<br />

of endpoints used <strong>and</strong> the maximum packet size. This dedicated memory is sized to 512<br />

bytes <strong>and</strong> up to 16 mono-directional or 8 bidirectional endpoints can be used.The USB<br />

peripheral interfaces with the USB host, detecting token packets, h<strong>and</strong>ling data<br />

transmission/reception, <strong>and</strong> processing h<strong>and</strong>shake packets as required by the USB<br />

st<strong>and</strong>ard. Transaction formatting is performed by the hardware, including CRC generation<br />

<strong>and</strong> checking.<br />

Each endpoint is associated with a buffer description block indicating where the endpoint<br />

related memory area is located, how large it is or how many bytes must be transmitted.<br />

When a token for a valid function/endpoint pair is recognized by the USB peripheral, the<br />

related data transfer (if required <strong>and</strong> if the endpoint is configured) takes place. The data<br />

buffered by the USB peripheral is loaded in an internal 16 bit register <strong>and</strong> memory access to<br />

the dedicated buffer is performed. When all the data has been transferred, if needed, the<br />

Doc ID 13902 Rev 9 513/995

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