STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

USB on-the-go full-speed (OTG_FS)
RM0008
●
on which the transfer is not completed in the current frame. This interrupt is
asserted along with the end of periodic frame interrupt (GINTSTS/EOPF).
3 OUT endpoints
– each of them can be configured to support the isochronous, bulk or interrupt
transfer type
– each of them has a proper control (DOEPCTLx), transfer configuration
(DOEPTSIZx) and status-interrupt (DOEPINTx) register
– Device Out endpoints common interrupt mask register (DOEPMSK) is available to
enable/disable a single kind of endpoint interrupt source on all of the OUT
endpoints (EP0 included)
– support incomplete isochronous OUT transfer interrupt (INCOMPISOOUT bit in
OTG_FS_GINTSTS), asserted when there is at least one isochronous OUT
endpoint on which the transfer is not completed in the current frame. This interrupt
is asserted along with the end of periodic frame interrupt (GINTSTS/EOPF).
Endpoint control
●
The following endpoint controls are available to the application through the device
endpoint-x IN/OUT control register (DIEPCTLx/DOEPCTLx):
– endpoint enable/disable
– endpoint activation in current configuration
– program the USB transfer type (isochronous, bulk, interrupt)
– program the supported packet size
– program the Tx-FIFO number associated with the IN endpoint
– program the expected or transmitted data0/data1 PID (bulk/interrupt only)
– program the even/odd frame during which the transaction is received or
transmitted (isochronous only)
– optionally program the NAK bit to always negative-acknowledge the host
regardless of the FIFO status
– optionally program the STALL bit to always stall host tokens to that endpoint
– optionally program the SNOOP mode for OUT endpoint not to check the CRC field
of received data
Endpoint transfer
The device endpoint-x transfer size registers (DIEPTSIZx/DOEPTSIZx) allow the application
to program the transfer size parameters and read the transfer status. Programming must be
done before setting the endpoint enable bit in the endpoint control register. Once the
endpoint is enabled, these fields are read-only as the OTG FS core updates them with the
current transfer status.
● The following transfer parameters can be programmed:
– transfer size in bytes
– number of packets constituing the overall transfer size
Endpoint status/interrupt
The device endpoint-x interrupt registers (DIEPINTx/DOPEPINTx) indicate the status of an
endpoint with respect to USB- and AHB-related events. The application must read these
registers when the OUT endpoint interrupt bit or the IN endpoint interrupt bit in the core
702/995 Doc ID 13902 Rev 9