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STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and ...

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Controller area network (bxCAN)<br />

RM0008<br />

Figure 200. Filter bank scale configuration - register organization<br />

FSCx = 1<br />

FBMx = 0<br />

FBMx = 1<br />

One 32-Bit Filter - Identifier Mask<br />

ID<br />

Mask<br />

Mapping<br />

Two 32-Bit Filters - Identifier List<br />

ID<br />

ID<br />

Mapping<br />

CAN_FxR1[31:24]<br />

CAN_FxR2[31:24]<br />

CAN_FxR1[23:16]<br />

CAN_FxR2[23:16]<br />

CAN_FxR1[15:8]<br />

CAN_FxR2[15:8]<br />

CAN_FxR1[7:0]<br />

CAN_FxR2[7:0]<br />

STID[10:3] STID[2:0] EXID[17:13]<br />

EXID[12:5]<br />

EXID[4:0] IDE RTR 0<br />

CAN_FxR1[31:24] CAN_FxR1[23:16] CAN_FxR1[15:8] CAN_FxR1[7:0]<br />

CAN_FxR2[31:24] CAN_FxR2[23:16] CAN_FxR2[15:8] CAN_FxR2[7:0]<br />

STID[10:3] STID[2:0] EXID[17:13]<br />

EXID[12:5]<br />

EXID[4:0] IDE RTR 0<br />

Filter<br />

Num.<br />

n<br />

n<br />

n+1<br />

FSCx = 0<br />

Filter Bank Scale<br />

Config. Bits 1<br />

FBMx = 0<br />

FBMx = 1<br />

Filter Bank Mode 2<br />

Two 16-Bit Filters - Identifier Mask<br />

ID<br />

Mask<br />

ID<br />

Mask<br />

Mapping<br />

CAN_FxR1[15:8]<br />

CAN_FxR1[31:24]<br />

STID[10:3]<br />

Four 16-Bit Filters - Identifier List<br />

ID<br />

ID<br />

ID<br />

ID<br />

Mapping<br />

CAN_FxR2[15:8]<br />

CAN_FxR2[31:24]<br />

CAN_FxR1[15:8]<br />

CAN_FxR1[31:24]<br />

CAN_FxR2[15:8]<br />

CAN_FxR2[31:24]<br />

STID[10:3]<br />

CAN_FxR1[7:0]<br />

CAN_FxR1[23:16]<br />

CAN_FxR2[7:0]<br />

CAN_FxR2[23:16]<br />

STID[2:0] RTR IDE EXID[17:15]<br />

CAN_FxR1[7:0]<br />

CAN_FxR1[23:16]<br />

CAN_FxR2[7:0]<br />

CAN_FxR2[23:16]<br />

STID[2:0] RTR IDE EXID[17:15]<br />

n<br />

n+1<br />

n+2<br />

n+3<br />

x = filter bank number<br />

ID=Identifier<br />

1 These bits are located in the CAN_FS1R register<br />

2 These bits are located in the CAN_FM1R register<br />

n<br />

n+1<br />

Filter match index<br />

Once a message has been received in the FIFO it is available to the application. Typically,<br />

application data is copied into SRAM locations. To copy the data to the right location the<br />

application has to identify the data by means of the identifier. To avoid this, <strong>and</strong> to ease the<br />

access to the SRAM locations, the CAN controller provides a Filter Match Index.<br />

This index is stored in the mailbox together with the message according to the filter priority<br />

rules. Thus each received message has its associated filter match index.<br />

The Filter Match index can be used in two ways:<br />

● Compare the Filter Match index with a list of expected values.<br />

● Use the Filter Match Index as an index on an array to access the data destination<br />

location.<br />

For non-masked filters, the software no longer has to compare the identifier.<br />

If the filter is masked the software reduces the comparison to the masked bits only.<br />

The index value of the filter number does not take into account the activation state of the<br />

filter banks. In addition, two independent numbering schemes are used, one for each FIFO.<br />

Refer to Figure 201 for an example.<br />

554/995 Doc ID 13902 Rev 9

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