Cortex-A8 R2P2.pdf - ARM Information Center

System Control Coprocessora. An entry of Undefined in the table means that the access gives an Undefined Instruction exception when the coprocessorinstruction is executed.To access the Auxiliary Control Register you must use a read modify write technique.To access the Auxiliary Control Register, read or write CP15 with:MRC p15, 0, , c1, c0, 1 ; Read Auxiliary Control RegisterMCR p15, 0, , c1, c0, 1 ; Write Auxiliary Control Register3.2.27 c1, Coprocessor Access Control RegisterThe purpose of the Coprocessor Access Control Register is to set access rights for thecoprocessors CP0 through CP13. This register has no effect on access to CP14, thedebug control coprocessor, or CP15, the system control coprocessor. This register alsoprovides a means for software to determine if any particular coprocessor, CP0-CP13,exists in the system.The Coprocessor Access Control Register is:• a read/write register common to Secure and Nonsecure states• accessible in privileged modes only.Figure 3-22 shows the bit arrangement of the Coprocessor Access Control Register.31 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0Reservedcp13 cp12 cp11 cp10 cp9 cp8 cp7 cp6 cp5 cp4 cp3 cp2 cp1 cp0Bits Field Function[31:28] - Reserved. UNP, SBZP.Figure 3-22 Coprocessor Access Control Register formatTable 3-51 shows how the bit values correspond with the Coprocessor Access ControlRegister functions.Table 3-51 Coprocessor Access Control Register bit functions- cp a Defines access permissions for each coprocessor. Access denied is the reset condition and is thebehavior for nonexistent coprocessors:b00 = Access denied, reset value. Attempted access generates an Undefined Instruction exception.b01 = Privileged mode access only.b10 = Reserved.b11 = Privileged and User mode access.ARM DDI 0344E Copyright © 2006-2008 ARM Limited. All rights reserved. 3-67