Cortex-A8 R2P2.pdf - ARM Information Center

Design for Testpttn[5:0]Use the pttn[5:0] field to select test patterns as Table 11-2 shows.Table 11-2 Selecting a test pattern with pttn[5:0]Fieldpttn[5:0]Selected test patternPattern select field: ab010010 = PTTN_WRITE_SOLIDb010011 = PTTN_READ_SOLIDb100001 = PTTN_SOLIDSb000010 = PTTN_WRITE_CKBDb000011 = PTTN_READ_CKBDb100011 = PTTN_CKBDb000100 = PTTN_XMARCH_Cb000101 = PTTN_PTTN_FAILb000110 = PTTN_RW_XMARCHb000111 = PTTN_RW_YMARCHb001000 = PTTN_RWR_XMARCHb001001 = PTTN_RWR_YMARCHb001010 = PTTN_WRITEBANGb101010 = PTTN_READBANGb001011 = PTTN_YMARCH_Cb001100 = PTTN_WRITE_ROWBARb001101 = PTTN_READ_ROWBARb101101 = PTTN_ROWBARb001110 = PTTN_WRITE_COLBARb001111 = PTTN_READ_COLBARb101111 = PTTN_COLBARb010000 = PTTN_RW_XADDRBARb010001 = PTTN_RW_YADDRBARb010100 = PTTN_ADDR_DECb000000 = PTTN_GONOGO bb111111 = PTTN_SLAVEa. See Pattern selection on page 11-24.b. Default value of pttn[5:0].NoteThe PTTN_SLAVE pattern (b111111) is for testing only the I-CAMBIST andD-CAMBIST.rtfailSetting the rtfail bit to 1 enables the fail signal to assert on every cycle that a failureoccurs. Clearing the rtfail bit to 0 causes a sticky failure reporting, and the fail signalremains asserted after the first failure that occurs. Reset clears the rtfail bit to 0.bitmapSetting the bitmap bit to1 enables bitmap test mode. Reset clears the instruction registerbitmap bit to 0. See Bitmap test mode on page 11-19.11-4 Copyright © 2006-2008 ARM Limited. All rights reserved. ARM DDI 0344E