Cortex-A8 R2P2.pdf - ARM Information Center

DebugNoteIn Example 12-10 on page 12-102, the second parameter of SetComplexBreakpoint()indicates the value to set BCR[22:20].This method of single-stepping steps off the instruction that might not necessarily be thesame as stepping to the next instruction executed. In certain circumstances, the nextinstruction executed might be the same instruction being stepped off.The simplest example of this is a branch to a self instruction such as (B .). In this case,the required behavior is most likely to step off the branch to self because this is oftenused as a means of waiting for an interrupt.A more complex example is a return from function that returns to the same point. Forexample, a simple recursive function might terminate with:BLPOPThisFunction{saved_registers, pc}In this case, the POP instruction loads a link register that is saved at the start of thefunction, and if that is the link register created by the BL instruction as shown, it pointsback at the POP instruction. Therefore, this single step code unwinds the entire callstack to the point of the original caller, rather than stepping out a level at a time.NoteIt is not possible to single step this piece of code using either the high-level or low-levelstepping method.12.11.4 Debug state entryOn entry to debug state, the debugger must first flush the load/store unit of pendingmemory transactions so that it can flag imprecise Data Aborts. The debugger can thenread the processor state, including all registers and the PC, and determine the cause ofthe exception from the DSCR Method of Entry bits.Example 12-11 shows the code for entry to debug state.Example 12-11 Entering debug stateOnEntryToDebugState(PROCESSOR_STATE *state){// Step 1. Read the DSCR to determine the cause of debug entry.state->dscr := ReadDebugRegister(34);// Step 2. Issue a Data Synchronization Barrier instruction if required;ARM DDI 0344E Copyright © 2006-2008 ARM Limited. All rights reserved. 12-103