Cortex-A8 R2P2.pdf - ARM Information Center

Design for TestTable 11-19 Summary of MBIST patterns (continued)PatternNAddressupdatingDescriptionFAIL 6N Row-fast R W march with built-in failures, see FAIL on page 11-35ADDRDECODER N(1 + 2log 2 N) NA Detection of open decoder faults on address lines, seeADDRESS DECODER on page 11-36Default GO-NOGO 32N Mix CKBD-RWRYMARCH-WRITEBANG, see GO-NOGOon page 11-36WCKBDWCOLBARWROWBARWSOLIDSRCKBDRCOLBARRROWBARRSOLIDS1N - Single pass wscan for I DDQ and data retention style tests1N - Single pass rscan for I DDQ and data retention style testsCAMBISTThe CAMBIST performs a simultaneous match check across all 32 entries bycomparing each entry against an incoming compare value. This function is executed byperforming a bitwise XOR of the inverted compare value and each individual CAMentry. If the XOR is true, a hit is determined. CAMBIST tests this compare function bytesting that each CAM bit is capable of generating a hit and a miss for both 1 and 0.CAMBIST performs the following sequence:1. Write all entries with 0xA.2. Write 0s to entry 0.3. Compare 0s and check for hit with 0s.4. Compare 0x00000001 and check for miss.5. Write 0x00000001 into CAM entry.6. Check for hit and miss with compare = 0x00000001 and 0s.7. Left shift compare bit until every bit is checked for hit and miss, repeating steps4-6 until all bits are tested.8. Write 0xAs to tested entry.9. Repeat steps 2-8 for all 32 CAM entries.11-26 Copyright © 2006-2008 ARM Limited. All rights reserved. ARM DDI 0344E