Cortex-A8 R2P2.pdf - ARM Information Center

Debug31 8 7 4 3 0ReservedSub typeMain classBits Field Function[31:8] - RAZ.Figure 12-28 Device Type Register formatTable 12-43 shows how the bit values correspond with the Device Type Registerfunctions.Table 12-43 Device Type Register bit functions[7:4] Sub type Indicates that the sub-type of the processor is core. This value is 0x1.[3:0] Main class Indicates that the main class of the processor is debug logic. This value is 0x5.12.5.12 Identification RegistersThe Identification Registers are read-only registers that consist of the PeripheralIdentification Registers and the Component Identification Registers. The PeripheralIdentification Registers provide standard information required by all CoreSightcomponents. Only bits [7:0] of each register are used, the remaining bits Read-As-Zero.The Component Identification Registers identify the processor as a CoreSightcomponent. Only bits [7:0] of each register are used, the remaining bits Read-As-Zero.The values in these registers are fixed.Table 12-44 shows the offset value, register number, and description that are associatedwith each Peripheral Identification Register.Table 12-44 Peripheral Identification RegistersOffset Register number Function0xFD0 1012 Peripheral Identification Register 40xFD4 1013 Reserved0xFD8 1014 Reserved0xFDC 1015 Reserved0xFE0 1016 Peripheral Identification Register 012-66 Copyright © 2006-2008 ARM Limited. All rights reserved. ARM DDI 0344E