Cortex-A8 R2P2.pdf - ARM Information Center

GlossaryCAM includes comparison logic with each bit of storage. A data value is broadcast toall words of storage and compared with the values there. Words that match are flaggedin some way. Subsequent operations can then work on flagged words. It is possible toread the flagged words out one at a time or write to certain bit positions in all of them.ContextThe environment that each process operates in for a multitasking operating system. InARM processors, this is limited to mean the physical address range that it can access inmemory and the associated memory access permissions.See also Fast context switch.Control bitsCoprocessorCopy backCoreCore resetCoreSightCPSRThe bottom eight bits of a Program Status Register. The control bits change when anexception arises and can be altered by software only when the processor is in aprivileged mode.A processor that supplements the main processor. It carries out additional functions thatthe main processor cannot perform. Usually used for floating-point math calculations,signal processing, or memory management.See Write-back.A core is that part of a processor that contains the ALU, the datapath, thegeneral-purpose registers, the Program Counter, and the instruction decode and controlcircuitry.See Warm reset.The infrastructure for monitoring, tracing, and debugging a complete system on chip.See Current Program Status RegisterCross Trigger Interface (CTI)Part of an Embedded Cross Trigger device. The CTI provides the interface between acore/ETM and the CTM within an ECT.Cross Trigger Matrix (CTM)The CTM combines the trigger requests generated from CTIs and broadcasts them toall CTIs as channel triggers within an Embedded Cross Trigger device.CTICTMSee Cross Trigger Interface.See Cross Trigger Matrix.Current Program Status Register (CPSR)The register that holds the current operating processor status.ARM DDI 0344E Copyright © 2006-2008 ARM Limited. All rights reserved. Glossary-9