Cortex-A8 R2P2.pdf - ARM Information Center

Debug12.11.1 Debug communications channelThere are two ways that an external debugger can send data to or receive data from thecore:• The debug communications channel, when the core is not in debug state. It isdefined as a set of resources used for communicating between the externaldebugger and a piece of software running on the core.• The mechanism for forcing the core to execute ARM instructions, when the coreis in debug state. See Executing instructions in debug state on page 12-80 fordetails.Rules for accessing the DCCAt the core side, the debug communications channel resources are:• CP14 Debug Register c5 (DTR)• CP14 Debug Register c1 (DSCR).Implementations of the ARMv7 debug for the processor are so that:• If a read of the CP14 DSCR returns 1 for the DTRRXfull flag, then a followingread of the CP14 DTR returns valid data and DTRRXfull is cleared to 0. Noprefetch flush is required between these two CP14 instructions.• If a read of the CP14 DSCR returns 0 for the DTRRXfull flag, then a followingread of the CP14 DTR returns an Unpredictable value.• If a read of the CP14 DSCR returns 0 for the DTRTXfull flag, then a followingwrite to the CP14 DTR writes the intended 32-bit word, and sets DTRTXfull to1. No prefetch flush is required between these two CP14 instructions.• If a read of the CP14 DSCR returns 1 for the DTRTXfull flag, then a followingwrite to the CP14 DTR is Unpredictable.When nonblocking mode is selected for DTR accesses, the following conditions are truefor memory-mapped DSCR, memory-mapped DTRRX, and DTRTX registers:• If a read of the memory-mapped DSCR returns 0 for the DTRRXfull flag, then afollowing write of the memory-mapped DTRRX passes valid data to theprocessor and sets DTRRXfull to 1.• If a read of the memory-mapped DSCR returns 1 for the DTRRXfull flag, then afollowing write of the memory-mapped DTRRX is ignored, that is, bothDTRRXfull and DTRRX contents are unchanged.ARM DDI 0344E Copyright © 2006-2008 ARM Limited. All rights reserved. 12-95