Cortex-A8 R2P2.pdf - ARM Information Center

AC CharacteristicsTable 17-2 Timing parameters of AXI interface (continued)SignalClockSetupparameterPercent ofclock periodHoldparameterAWID[3:0] CLK T ovawid 30% T ohawidAWLEN[3:0] CLK T ovawlen 30% T ohawlenAWLOCK[1:0] CLK T ovawlock 30% T ohawlockAWPROT[2:0] CLK T ovawprot 30% T ohawprotAWSIZE[2:0] CLK T ovawsize 30% T ohawsizeAWVALID CLK T ovawvalid 30% T ohawvalidAWREADY CLK T isawready 30% T ihawreadyWDATA[127:0] CLK T ovwdata 30% T ohwdataWID[3:0] CLK T ovwid 30% T ohwidWLAST CLK T ovwlast 30% T ohwlastWSTRB[15:0] CLK T ovwstrb 30% T ohwstrbWVALID CLK T ovwvalid 30% T ohwvalidWREADY CLK T iswready 30% T ihwreadyBID[3:0] CLK T isbid 30% T ihbidBRESP[1:0] CLK T isbresp 30% T ihbrespBVALID CLK T isbvalid 30% T ihbvalidBREADY CLK T ovbready 30% T ohbreadya. This is a static input to the processor.ARM DDI 0344E Copyright © 2006-2008 ARM Limited. All rights reserved. 17-5